llvm-6502/lib/Target/Sparc
Chris Lattner 3fbb726141 Fix a bug in i32->f64 conversion lowering
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25211 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-11 07:27:40 +00:00
..
.cvsignore
DelaySlotFiller.cpp
FPMover.cpp add fneg/fabs support for doubles 2005-12-19 00:50:12 +00:00
Makefile
README.txt not a good idea 2005-12-23 07:37:47 +00:00
Sparc.h
Sparc.td
SparcAsmPrinter.cpp
SparcInstrFormats.td
SparcInstrInfo.cpp
SparcInstrInfo.h
SparcInstrInfo.td Unbreak ret void :-/ 2006-01-11 07:15:43 +00:00
SparcISelDAGToDAG.cpp Fix a bug in i32->f64 conversion lowering 2006-01-11 07:27:40 +00:00
SparcRegisterInfo.cpp New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace 2006-01-09 18:28:21 +00:00
SparcRegisterInfo.h
SparcRegisterInfo.td Reserve G1 for frame offset stuff and use it to handle large stack frames. 2005-12-20 07:56:31 +00:00
SparcTargetMachine.cpp Run lower-switch after lower-invoke. 2005-12-20 08:00:11 +00:00
SparcTargetMachine.h
SparcV8ISelSimple.cpp Elimiante SP and FP, which weren't members of the IntRegs register class 2005-12-19 00:06:52 +00:00

Meta TODO list:
1. Create a new DAG -> DAG instruction selector, by adding patterns to the
   instructions.
2. ???
3. profit!

To-do
-----

* Keep the address of the constant pool in a register instead of forming its
  address all of the time.
* We can fold small constant offsets into the %hi/%lo references to constant
  pool addresses as well.