Nate Begeman 7532e2f555 Fix that pesky floats in integer regs problem by assigning the f32 type to ...

the correct register class.  Also remove the loading of float data into int
regs part of varargs; it will need to be implemented differently later.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20857 91177308-0d34-0410-b5e6-96231b3b80d8

2005-03-26 08:25:22 +00:00

..

Alpha

Change interface to LowerCallTo to take a boolean isVarArg argument.

2005-03-26 01:29:23 +00:00

CBackend

Fix the 3 regressions last night, due to my buggy patch from yesterday.

2005-03-19 17:35:11 +00:00

IA64

Change interface to LowerCallTo to take a boolean isVarArg argument.

2005-03-26 01:29:23 +00:00

PowerPC

Fix that pesky floats in integer regs problem by assigning the f32 type to

2005-03-26 08:25:22 +00:00

Skeleton

…

Sparc

This mega patch converts us from using Function::a{iterator|begin|end} to

2005-03-15 04:54:21 +00:00

SparcV8

This mega patch converts us from using Function::a{iterator|begin|end} to

2005-03-15 04:54:21 +00:00

SparcV9

Fix compilation errors, patch contributed by the fabulous Bill Wendling!

2005-03-24 05:13:53 +00:00

X86

Change interface to LowerCallTo to take a boolean isVarArg argument.

2005-03-26 01:29:23 +00:00

Makefile

build the IA64 target as a .so for now

2005-03-17 18:29:04 +00:00

MRegisterInfo.cpp

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Target.td

Add some bits that can be set for instructions.

2005-01-02 02:27:48 +00:00

TargetData.cpp

add a StructLayout::getElementContainingOffset method.

2005-03-13 19:04:41 +00:00

TargetFrameInfo.cpp

Fix compilation errors with VS 2005, patch contributed by Aaron Gray.

2005-02-17 21:40:27 +00:00

TargetInstrInfo.cpp

Finegrainify namespacification

2005-01-19 06:53:34 +00:00

TargetMachine.cpp

Add a new target-independent code generator flag.

2005-01-15 06:00:32 +00:00

TargetMachineRegistry.cpp

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TargetSchedInfo.cpp

Improve compatiblity with HPUX on Itanium, patch by Duraid Madina

2005-01-16 01:31:31 +00:00