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1f996fa36b
This is equivalent to the AMDGPUTargetMachine now, but it is the starting point for separating R600 and GCN functionality into separate targets. It is recommened that users start using the gcn triple for GCN-based GPUs, because using the r600 triple for these GPUs will be deprecated in the future. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225277 91177308-0d34-0410-b5e6-96231b3b80d8
41 lines
950 B
LLVM
41 lines
950 B
LLVM
; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck %s
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; CHECK-LABEL: {{^}}fold_sgpr:
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; CHECK: v_add_i32_e32 v{{[0-9]+}}, s
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define void @fold_sgpr(i32 addrspace(1)* %out, i32 %fold) {
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entry:
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%tmp0 = icmp ne i32 %fold, 0
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br i1 %tmp0, label %if, label %endif
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if:
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%id = call i32 @llvm.r600.read.tidig.x()
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%offset = add i32 %fold, %id
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%tmp1 = getelementptr i32 addrspace(1)* %out, i32 %offset
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store i32 0, i32 addrspace(1)* %tmp1
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br label %endif
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endif:
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ret void
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}
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; CHECK-LABEL: {{^}}fold_imm:
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; CHECK v_or_i32_e32 v{{[0-9]+}}, 5
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define void @fold_imm(i32 addrspace(1)* %out, i32 %cmp) {
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entry:
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%fold = add i32 3, 2
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%tmp0 = icmp ne i32 %cmp, 0
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br i1 %tmp0, label %if, label %endif
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if:
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%id = call i32 @llvm.r600.read.tidig.x()
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%val = or i32 %id, %fold
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store i32 %val, i32 addrspace(1)* %out
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br label %endif
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endif:
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ret void
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}
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declare i32 @llvm.r600.read.tidig.x() #0
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attributes #0 = { readnone }
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