llvm-6502/utils/TableGen
Chris Lattner 42de581b2f Refactor to use Target.getRegisterClasses consistently, which provides
anonymous regclass definition renaming.

Change the generated code to emit register classes as properly namespace
qualified entities like everything else.

expose the actual class definition as an object, though this isn't quite
usable yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22920 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 18:47:59 +00:00
..
.cvsignore
AsmWriterEmitter.cpp Eliminate all remaining tabs and trailing spaces. 2005-07-27 06:12:32 +00:00
AsmWriterEmitter.h
CodeEmitterGen.cpp The code emitter generator only supports targets with 32-bit instruction 2005-08-19 01:04:33 +00:00
CodeEmitterGen.h
CodeGenInstruction.h For now, just emit empty operand info structures. 2005-08-19 16:57:28 +00:00
CodeGenRegisters.h Read the namespace field from register classes 2005-08-19 18:45:20 +00:00
CodeGenTarget.cpp Read the namespace field from register classes 2005-08-19 18:45:20 +00:00
CodeGenTarget.h
FileLexer.l
FileParser.y
InstrInfoEmitter.cpp Emit real operand info for instructions. This currently works but is bad 2005-08-19 18:46:26 +00:00
InstrInfoEmitter.h Emit real operand info for instructions. This currently works but is bad 2005-08-19 18:46:26 +00:00
InstrSelectorEmitter.cpp
InstrSelectorEmitter.h
Makefile
Record.cpp Add a setName method to Record. 2005-08-19 17:58:11 +00:00
Record.h add a setName method to record 2005-08-19 17:58:49 +00:00
RegisterInfoEmitter.cpp Refactor to use Target.getRegisterClasses consistently, which provides 2005-08-19 18:47:59 +00:00
RegisterInfoEmitter.h
TableGen.cpp
TableGenBackend.cpp
TableGenBackend.h