Bruno Cardoso Lopes 43edafcc07 [CompactUnwind] Fix register encoding logic ...

Fix a compact unwind encoding logic bug which would try to encode
more callee saved registers than it should, leading to early bail out
in the encoding logic and abusive use of DWARF frame mode unnecessarily.

Also remove no-compact-unwind.ll which was testing the wrong thing
based on this bug and move it to valid 'compact unwind' tests. Added
other few more tests too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223676 91177308-0d34-0410-b5e6-96231b3b80d8

2014-12-08 18:18:32 +00:00

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AArch64

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ARM

Improvements to ARM assembler tests

2014-12-05 16:33:56 +00:00

AsmParser

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COFF

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Disassembler

[Hexagon] Adding combine reg, reg with predicated forms.

2014-12-08 17:33:06 +00:00

ELF

Commit back the correct bits of r222760 (was r222538).

2014-11-27 17:13:56 +00:00

Hexagon

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MachO

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Markup

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Mips

The andi16, addiusp and jraddiusp micromips instructions were missing dedicated decoder methods in MipsDisassembler.cpp to properly decode immediate operands. These methods are added together with corresponding tests.

2014-12-01 11:12:04 +00:00

PowerPC

[PowerPC] Add asm support for cache-inhibited ld/st instructions

2014-11-30 10:15:56 +00:00

R600

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Sparc

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SystemZ

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X86

[CompactUnwind] Fix register encoding logic

2014-12-08 18:18:32 +00:00