Tim Northover 4413539ee4 ARM: support legalisation of "fptrunc ... to half" operations. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213373 91177308-0d34-0410-b5e6-96231b3b80d8

2014-07-18 13:01:19 +00:00

..

AArch64

CodeGen: soften f16 type by default instead of marking legal.

2014-07-18 12:41:46 +00:00

ARM

ARM: support legalisation of "fptrunc ... to half" operations.

2014-07-18 13:01:19 +00:00

CPP

IR: add "cmpxchg weak" variant to support permitted failure.

2014-06-13 14:24:07 +00:00

Generic

Add a new attribute called 'jumptable' that creates jump-instruction tables for functions marked with this attribute.

2014-06-05 19:29:43 +00:00

Hexagon

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00

Inputs

…

Mips

[mips] For the FP64A ABI, odd-numbered double-precision moves must not use mtc1/mfc1.

2014-07-14 13:08:14 +00:00

MSP430

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00

NVPTX

CodeGen: soften f16 type by default instead of marking legal.

2014-07-18 12:41:46 +00:00

PowerPC

[PowerPC] Fix invalid displacement created by LocalStackAlloc

2014-07-11 17:19:31 +00:00

R600

CodeGen: soften f16 type by default instead of marking legal.

2014-07-18 12:41:46 +00:00

SPARC

IR: add "cmpxchg weak" variant to support permitted failure.

2014-06-13 14:24:07 +00:00

SystemZ

IR: add "cmpxchg weak" variant to support permitted failure.

2014-06-13 14:24:07 +00:00

Thumb

ARM: Fix fastcc calling convention for Thumb1

2014-06-13 08:33:03 +00:00

Thumb2

ARM: Fix TPsoft for Thumb mode

2014-06-24 15:45:59 +00:00

X86

CodeGen: soften f16 type by default instead of marking legal.

2014-07-18 12:41:46 +00:00

XCore

llvm/test/CodeGen/XCore/dwarf_debug.ll: Fix not to be affected by *-win32.

2014-07-04 11:58:03 +00:00