llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-08-15 22:28:18 +00:00

Files

Brian Gaeke 446ae11d7c Allow special-casing of operand printing based on opcode. Print

non-register, non-immed. arguments to SETHI and OR using %hi() and
%lo() respectively.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14176 91177308-0d34-0410-b5e6-96231b3b80d8

2004-06-15 19:52:59 +00:00

DelaySlotFiller.cpp

Add in some things I forgot, which Chris helpfully reminded me of...

2004-04-07 04:05:12 +00:00

InstSelectSimple.cpp

Support constant GEP expressions.

2004-06-15 19:16:07 +00:00

Makefile

Clean up rules

2004-02-28 19:43:40 +00:00

README.txt

…

Sparc.h

Add references to delay slot filler pass.

2004-04-06 23:21:24 +00:00

Sparc.td

Delete reference to "the Mach-O Runtime ABI".

2004-04-06 22:09:59 +00:00

SparcAsmPrinter.cpp

Allow special-casing of operand printing based on opcode. Print

2004-06-15 19:52:59 +00:00

SparcInstrInfo.cpp

Adjust to change in TII ctor arguments

2004-02-29 06:31:44 +00:00

SparcInstrInfo.h

These two virtual methods are never called.

2004-02-29 05:59:33 +00:00

SparcInstrInfo.td

Add a bunch more branches

2004-05-08 06:08:29 +00:00

SparcRegisterInfo.cpp

I don't think we have to have 4 extra allocated (but unused) bytes on the stack.

2004-04-13 18:28:37 +00:00

SparcRegisterInfo.h

…

SparcRegisterInfo.td

Merge my changes with brians

2004-04-07 04:05:49 +00:00

SparcTargetMachine.cpp

I don't think we have to have 4 extra allocated (but unused) bytes on the stack.

2004-04-13 18:28:37 +00:00

SparcTargetMachine.h

Adjust to new TM interfaces

2004-06-02 05:47:26 +00:00

SparcV8CodeEmitter.cpp

…

SparcV8InstrInfo_F2.td

Tab completion is our friend.

2004-02-28 19:45:39 +00:00

SparcV8InstrInfo_F3.td

Tab completion is our friend.

2004-02-28 19:45:39 +00:00

SparcV8ISelSimple.cpp

Support constant GEP expressions.

2004-06-15 19:16:07 +00:00

SparcV8JITInfo.h

…

README.txt

SparcV8 backend skeleton
------------------------

This directory will house a 32-bit SPARC V8 backend employing a expander-based
instruction selector.  Watch this space for more news coming soon!

$Date$