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mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-04-01 18:33:56 +00:00
Tim Northover 44edc227c7 ARM: Mark double-precision instructions as such
This prevents us from silently accepting invalid instructions on (for example)
Cortex-M4 with just single-precision VFP support.

No tests for the extra Pat Requires because they're essentially assertions: the
affected code should have been lowered to libcalls before ISel.

rdar://problem/15302004

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193354 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-24 15:49:39 +00:00
..
2013-08-22 20:46:05 +00:00
2013-10-23 17:57:04 +00:00