mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-10-31 08:16:47 +00:00
ff0c5014b2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124722 91177308-0d34-0410-b5e6-96231b3b80d8
37 lines
1.5 KiB
TableGen
37 lines
1.5 KiB
TableGen
//===- XCoreCallingConv.td - Calling Conventions for XCore -*- tablegen -*-===//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
// This describes the calling conventions for XCore architecture.
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// XCore Return Value Calling Convention
|
|
//===----------------------------------------------------------------------===//
|
|
def RetCC_XCore : CallingConv<[
|
|
// i32 are returned in registers R0, R1, R2, R3
|
|
CCIfType<[i32], CCAssignToReg<[R0, R1, R2, R3]>>
|
|
]>;
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// XCore Argument Calling Conventions
|
|
//===----------------------------------------------------------------------===//
|
|
def CC_XCore : CallingConv<[
|
|
// Promote i8/i16 arguments to i32.
|
|
CCIfType<[i8, i16], CCPromoteToType<i32>>,
|
|
|
|
// The 'nest' parameter, if any, is passed in R11.
|
|
CCIfNest<CCAssignToReg<[R11]>>,
|
|
|
|
// The first 4 integer arguments are passed in integer registers.
|
|
CCIfType<[i32], CCAssignToReg<[R0, R1, R2, R3]>>,
|
|
|
|
// Integer values get stored in stack slots that are 4 bytes in
|
|
// size and 4-byte aligned.
|
|
CCIfType<[i32], CCAssignToStack<4, 4>>
|
|
]>;
|