Jakob Stoklund Olesen 459b74b964 Encode register class constreaints in inline asm instructions.
The inline asm operand constraint is initially encoded in the virtual
register for the operand, but that register class may change during
coalescing, and the original constraint is lost.

Encode the original register class as part of the flag word for each
inline asm operand.  This makes it possible to recover the actual
constraint required by inline asm, just like we can for normal
instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141833 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 23:37:29 +00:00
2011-10-12 23:14:41 +00:00
2011-09-19 05:34:10 +00:00
2011-06-12 15:26:54 +00:00

Low Level Virtual Machine (LLVM)
================================

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LLVM backend for 6502
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