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46cbff625e
Value to a vector instead of a list. Move SchedGraph.h & SchedPriorities.h into lib/CodeGen/InstrScheduling git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@572 91177308-0d34-0410-b5e6-96231b3b80d8
122 lines
3.8 KiB
C++
122 lines
3.8 KiB
C++
//***************************************************************************
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// File:
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// Sparc.cpp
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//
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// Purpose:
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//
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// History:
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// 7/15/01 - Vikram Adve - Created
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//**************************************************************************/
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#include "llvm/Target/Sparc.h"
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#include "SparcInternals.h"
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#include "llvm/Method.h"
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#include "llvm/CodeGen/InstrScheduling.h"
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#include "llvm/CodeGen/InstrSelection.h"
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// allocateSparcTargetMachine - Allocate and return a subclass of TargetMachine
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// that implements the Sparc backend. (the llvm/CodeGen/Sparc.h interface)
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//
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TargetMachine *allocateSparcTargetMachine() { return new UltraSparc(); }
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//---------------------------------------------------------------------------
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// class UltraSparcInstrInfo
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//
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// Purpose:
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// Information about individual instructions.
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// Most information is stored in the SparcMachineInstrDesc array above.
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// Other information is computed on demand, and most such functions
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// default to member functions in base class MachineInstrInfo.
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//---------------------------------------------------------------------------
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/*ctor*/
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UltraSparcInstrInfo::UltraSparcInstrInfo()
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: MachineInstrInfo(SparcMachineInstrDesc,
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/*descSize = */ NUM_TOTAL_OPCODES,
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/*numRealOpCodes = */ NUM_REAL_OPCODES)
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{
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}
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//---------------------------------------------------------------------------
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// class UltraSparcSchedInfo
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//
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// Purpose:
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// Scheduling information for the UltraSPARC.
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// Primarily just initializes machine-dependent parameters in
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// class MachineSchedInfo.
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//---------------------------------------------------------------------------
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/*ctor*/
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UltraSparcSchedInfo::UltraSparcSchedInfo(const MachineInstrInfo* mii)
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: MachineSchedInfo((unsigned int) SPARC_NUM_SCHED_CLASSES,
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mii,
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SparcRUsageDesc,
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SparcInstrUsageDeltas,
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SparcInstrIssueDeltas,
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sizeof(SparcInstrUsageDeltas)/sizeof(InstrRUsageDelta),
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sizeof(SparcInstrIssueDeltas)/sizeof(InstrIssueDelta))
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{
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maxNumIssueTotal = 4;
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longestIssueConflict = 0; // computed from issuesGaps[]
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branchMispredictPenalty = 4; // 4 for SPARC IIi
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branchTargetUnknownPenalty = 2; // 2 for SPARC IIi
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l1DCacheMissPenalty = 8; // 7 or 9 for SPARC IIi
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l1ICacheMissPenalty = 8; // ? for SPARC IIi
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inOrderLoads = true; // true for SPARC IIi
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inOrderIssue = true; // true for SPARC IIi
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inOrderExec = false; // false for most architectures
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inOrderRetire= true; // true for most architectures
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// must be called after above parameters are initialized.
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this->initializeResources();
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}
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void
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UltraSparcSchedInfo::initializeResources()
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{
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// Compute MachineSchedInfo::instrRUsages and MachineSchedInfo::issueGaps
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MachineSchedInfo::initializeResources();
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// Machine-dependent fixups go here. None for now.
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}
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//---------------------------------------------------------------------------
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// class UltraSparcMachine
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//
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// Purpose:
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// Primary interface to machine description for the UltraSPARC.
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// Primarily just initializes machine-dependent parameters in
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// class TargetMachine, and creates machine-dependent subclasses
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// for classes such as MachineInstrInfo.
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//
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//---------------------------------------------------------------------------
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UltraSparc::UltraSparc() : TargetMachine("UltraSparc-Native"),
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InstSchedulingInfo(&InstInfo) {
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optSizeForSubWordData = 4;
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minMemOpWordSize = 8;
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maxAtomicMemOpWordSize = 8;
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zeroRegNum = 0; // %g0 always gives 0 on Sparc
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}
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bool UltraSparc::compileMethod(Method *M) {
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if (SelectInstructionsForMethod(M, *this)) {
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cerr << "Instruction selection failed for method " << M->getName()
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<< "\n\n";
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return true;
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}
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if (ScheduleInstructionsWithSSA(M, *this, InstSchedulingInfo)) {
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cerr << "Instruction scheduling before allocation failed for method "
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<< M->getName() << "\n\n";
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return true;
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}
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return false;
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}
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