mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2026-04-27 04:18:42 +00:00
Sanjoy Das
477137f4d7
Summary:
If a scale or a base register can be rewritten as "Zext({A,+,1})" then
LSR will now consider a formula of that form in its normal cost
computation.
Depends on D9180
Reviewers: qcolombet, atrick
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D9181
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243348 91177308-0d34-0410-b5e6-96231b3b80d8
71 lines
2.4 KiB
LLVM
71 lines
2.4 KiB
LLVM
; RUN: opt < %s -S -loop-reduce | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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%struct = type { [8 x i8] }
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declare void @use_32(i32)
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declare void @use_64(i64)
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define void @f(i32 %tmp156, i32* %length_buf_1, i32* %length_buf_0, %struct* %b,
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%struct* %c, %struct* %d, %struct* %e, i32* %length_buf_2,
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i32 %tmp160) {
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; CHECK-LABEL: @f(
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entry:
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%begin151 = getelementptr inbounds %struct, %struct* %b, i64 0, i32 0, i64 12
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%tmp21 = bitcast i8* %begin151 to i32*
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%begin157 = getelementptr inbounds %struct, %struct* %c, i64 0, i32 0, i64 16
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%tmp23 = bitcast i8* %begin157 to double*
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%begin163 = getelementptr inbounds %struct, %struct* %d, i64 0, i32 0, i64 16
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%tmp25 = bitcast i8* %begin163 to double*
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%length.i820 = load i32, i32* %length_buf_1, align 4, !range !0
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%enter = icmp ne i32 %tmp156, -1
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br i1 %enter, label %ok_146, label %block_81_2
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ok_146:
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%var_13 = phi double [ %tmp186, %ok_161 ], [ 0.000000e+00, %entry ]
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%var_17 = phi i32 [ %tmp187, %ok_161 ], [ %tmp156, %entry ]
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%tmp174 = zext i32 %var_17 to i64
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%tmp175 = icmp ult i32 %var_17, %length.i820
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br i1 %tmp175, label %ok_152, label %block_81_2
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ok_152:
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%tmp176 = getelementptr inbounds i32, i32* %tmp21, i64 %tmp174
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%tmp177 = load i32, i32* %tmp176, align 4
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%tmp178 = zext i32 %tmp177 to i64
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%length.i836 = load i32, i32* %length_buf_2, align 4, !range !0
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%tmp179 = icmp ult i32 %tmp177, %length.i836
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br i1 %tmp179, label %ok_158, label %block_81_2
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ok_158:
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%tmp180 = getelementptr inbounds double, double* %tmp23, i64 %tmp178
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%tmp181 = load double, double* %tmp180, align 8
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%length.i = load i32, i32* %length_buf_0, align 4, !range !0
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%tmp182 = icmp slt i32 %var_17, %length.i
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br i1 %tmp182, label %ok_161, label %block_81_2
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ok_161:
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; CHECK-LABEL: ok_161:
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; CHECK: add
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; CHECK-NOT: add
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%tmp183 = getelementptr inbounds double, double* %tmp25, i64 %tmp174
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%tmp184 = load double, double* %tmp183, align 8
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%tmp185 = fmul double %tmp181, %tmp184
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%tmp186 = fadd double %var_13, %tmp185
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%tmp187 = add nsw i32 %var_17, 1
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%tmp188 = icmp slt i32 %tmp187, %tmp160
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; CHECK: br
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br i1 %tmp188, label %ok_146, label %block_81
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block_81:
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call void @use_64(i64 %tmp174) ;; pre-inc use
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call void @use_32(i32 %tmp187) ;; post-inc use
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ret void
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block_81_2:
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ret void
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}
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!0 = !{i32 0, i32 2147483647}
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