Louis Gerbarg 479af7ce0c Make AArch64FastISel::EmitIntExt explicitly check its source and destination types ...

This is a follow up to r212492. There should be no functional difference, but
this patch makes it clear that SrcVT must be an i1/i8/16/i32 and DestVT must be
an i8/i16/i32/i64.

rdar://17516686

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212633 91177308-0d34-0410-b5e6-96231b3b80d8

2014-07-09 17:54:32 +00:00

..

AsmParser

Truncate the immediate in logical operation to the register width

2014-07-08 09:53:04 +00:00

Disassembler

Convert some assert(0) to llvm_unreachable or fold an 'if' condition into the assert.

2014-06-19 06:10:58 +00:00

InstPrinter

Replace some assert(0)'s with llvm_unreachable.

2014-06-18 05:05:13 +00:00

MCTargetDesc

Move expression visitation logic up to MCStreamer.

2014-06-25 15:45:33 +00:00

TargetInfo

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Utils

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AArch64.h

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AArch64.td

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AArch64AddressTypePromotion.cpp

AArch64: Re-enable AArch64AddressTypePromotion

2014-07-02 18:17:40 +00:00

AArch64AdvSIMDScalarPass.cpp

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AArch64AsmPrinter.cpp

Replace some assert(0)'s with llvm_unreachable.

2014-06-18 05:05:13 +00:00

AArch64BranchRelaxation.cpp

Replace some assert(0)'s with llvm_unreachable.

2014-06-18 05:05:13 +00:00

AArch64CallingConvention.td

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AArch64CleanupLocalDynamicTLSPass.cpp

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AArch64CollectLOH.cpp

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AArch64ConditionalCompares.cpp

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AArch64DeadRegisterDefinitionsPass.cpp

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AArch64ExpandPseudoInsts.cpp

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AArch64FastISel.cpp

Make AArch64FastISel::EmitIntExt explicitly check its source and destination types

2014-07-09 17:54:32 +00:00

AArch64FrameLowering.cpp

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AArch64FrameLowering.h

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AArch64InstrAtomics.td

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AArch64InstrFormats.td

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AArch64InstrInfo.cpp

Replace some assert(0)'s with llvm_unreachable.

2014-06-18 05:05:13 +00:00

AArch64InstrInfo.h

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AArch64InstrInfo.td

AArch64: Better codegen for loading from __fp16.

2014-07-08 23:28:48 +00:00

AArch64ISelDAGToDAG.cpp

[AArch64] Unsized types don't specify an alignment.

2014-06-30 15:03:00 +00:00

AArch64ISelLowering.cpp

[AArch64] Normalize all constants to build a vector.

2014-07-07 02:45:40 +00:00

AArch64ISelLowering.h

[codegen,aarch64] Add a target hook to the code generator to control

2014-07-03 00:23:43 +00:00

AArch64LoadStoreOptimizer.cpp

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AArch64MachineFunctionInfo.h

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AArch64MCInstLower.cpp

Replace some assert(0)'s with llvm_unreachable.

2014-06-18 05:05:13 +00:00

AArch64MCInstLower.h

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AArch64PerfectShuffle.h

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AArch64PromoteConstant.cpp

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AArch64RegisterInfo.cpp

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AArch64RegisterInfo.h

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AArch64RegisterInfo.td

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AArch64SchedA53.td

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AArch64SchedA57.td

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AArch64SchedA57WriteRes.td

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AArch64SchedCyclone.td

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AArch64Schedule.td

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AArch64SelectionDAGInfo.cpp

[DAG] Pass the argument list to the CallLoweringInfo via move semantics. NFCI.

2014-07-01 22:01:54 +00:00

AArch64SelectionDAGInfo.h

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AArch64StorePairSuppress.cpp

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AArch64Subtarget.cpp

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AArch64Subtarget.h

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AArch64TargetMachine.cpp

AArch64: Re-enable AArch64AddressTypePromotion

2014-07-02 18:17:40 +00:00

AArch64TargetMachine.h

Remove extraneous includes from the target machines.

2014-06-26 19:30:05 +00:00

AArch64TargetObjectFile.cpp

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AArch64TargetObjectFile.h

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AArch64TargetTransformInfo.cpp

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CMakeLists.txt

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LLVMBuild.txt

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Makefile

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