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f6f8198d85
On PowerPC, non-vector loads and stores have r+i forms; however, in functions with large stack frames these were not being used to access slots far from the stack pointer because such slots were out of range for the signed 16-bit immediate offset field. This increases register pressure because we need a separate register for each offset (when the r+r form is used). By enabling virtual base registers, we can deal with large stack frames without unduly increasing register pressure. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179105 91177308-0d34-0410-b5e6-96231b3b80d8
25 lines
781 B
LLVM
25 lines
781 B
LLVM
; RUN: llc < %s -march=ppc64 | FileCheck %s
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; Temporarily XFAIL this test until LSA stops creating single-use
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; virtual base registers.
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; XFAIL: *
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%struct.__db_region = type { %struct.__mutex_t, [4 x i8], %struct.anon, i32, [1 x i32] }
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%struct.__mutex_t = type { i32 }
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%struct.anon = type { i64, i64 }
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define void @foo() {
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entry:
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%ttype = alloca i32, align 4 ; <i32*> [#uses=1]
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%regs = alloca [1024 x %struct.__db_region], align 16 ; <[1024 x %struct.__db_region]*> [#uses=0]
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%tmp = load i32* %ttype, align 4 ; <i32> [#uses=1]
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%tmp1 = call i32 (...)* @bork( i32 %tmp ) ; <i32> [#uses=0]
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ret void
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; CHECK: @foo
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; CHECK: lwzx
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; CHECK: blr
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}
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declare i32 @bork(...)
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