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497417520cf9a3b7d4114c1f5f0f21b76d3065c8
llvm-6502/test/MC/Disassembler
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Craig Topper 95a3ccdd80 Remove need for MODIFIER_OPCODE in the disassembler tables. AddRegFrms are really more like OrRegFrm so we don't need a difference since we can just mask bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198278 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-01 15:29:32 +00:00
..
AArch64
[AArch64 NEON]Fix a assertion failure when disassemble SHLL instruction.
2013-11-29 01:29:16 +00:00
ARM
[ARM] Add support for MVFR2 which is new in ARMv8
2013-11-11 19:56:13 +00:00
Mips
Support for microMIPS trap instruction with immediate operands.
2013-11-13 13:15:03 +00:00
PowerPC
Add a disassembler to the PowerPC backend
2013-12-19 16:13:01 +00:00
SystemZ
[SystemZ] Add MC support for interlocked-access 1 instructions
2013-12-24 15:14:05 +00:00
X86
Remove need for MODIFIER_OPCODE in the disassembler tables. AddRegFrms are really more like OrRegFrm so we don't need a difference since we can just mask bits.
2014-01-01 15:29:32 +00:00
XCore
[tests] Cleanup initialization of test suffixes.
2013-08-16 00:37:11 +00:00
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