Dale Johannesen 7f6eb639bd Use sdmem and sse_load_f64 (etc.) for the vector ...

form of CMPSD (etc.)  Matching a 128-bit memory
operand is wrong, the instruction uses only 64 bits
(same as ADDSD etc.)  8193553.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110491 91177308-0d34-0410-b5e6-96231b3b80d8

2010-08-07 00:33:42 +00:00

..

Alpha

PR7774: Fix undefined shifts in Alpha backend. As a bonus, this actually

2010-08-01 21:13:28 +00:00

ARM

Fix eabi calling convention when a 64 bit value shadows r3.

2010-08-06 15:35:32 +00:00

Blackfin

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CBackend

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CellSPU

Make SPU backend handle insertelement and

2010-08-04 13:59:48 +00:00

CPP

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Generic

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MBlaze

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Mips

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MSP430

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PIC16

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PowerPC

PR7781: Fix incorrect shifting in PPCTargetLowering::LowerBUILD_VECTOR.

2010-08-02 00:18:19 +00:00

SPARC

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SystemZ

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Thumb

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Thumb2

Many Thumb2 instructions can reference the full ARM register set (i.e.,

2010-07-30 02:41:01 +00:00

X86

Use sdmem and sse_load_f64 (etc.) for the vector

2010-08-07 00:33:42 +00:00

XCore

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