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llvm-6502/utils/TableGen
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Chad Rosier 4c1d2baa7c Formatting. No functional change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162292 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21 17:22:47 +00:00
..
AsmMatcherEmitter.cpp
Formatting. No functional change.
2012-08-21 17:22:47 +00:00
AsmWriterEmitter.cpp
Clean up includes.
2012-07-27 06:44:02 +00:00
AsmWriterInst.cpp
…
AsmWriterInst.h
…
CallingConvEmitter.cpp
Write llvm-tblgen backends as functions instead of sub-classes.
2012-06-11 15:37:55 +00:00
CMakeLists.txt
I'm introducing a new machine model to simultaneously allow simple
2012-07-07 04:00:00 +00:00
CodeEmitterGen.cpp
Write llvm-tblgen backends as functions instead of sub-classes.
2012-06-11 15:37:55 +00:00
CodeGenDAGPatterns.cpp
TableGen: Pattern<> references to null_frag are a nop.
2012-07-17 18:39:36 +00:00
CodeGenDAGPatterns.h
…
CodeGenInstruction.cpp
Add an MCID::Select flag and TII hooks for optimizing selects.
2012-08-16 23:11:47 +00:00
CodeGenInstruction.h
Add an MCID::Select flag and TII hooks for optimizing selects.
2012-08-16 23:11:47 +00:00
CodeGenIntrinsics.h
rdar://11542750 - llvm.trap should be marked no return.
2012-05-27 23:20:41 +00:00
CodeGenRegisters.cpp
Add a CoveringSubRegIndices field to SubRegIndex records.
2012-08-15 20:15:48 +00:00
CodeGenRegisters.h
Make synthesized sub-register indexes available in the target namespace.
2012-08-15 18:00:55 +00:00
CodeGenSchedule.cpp
I'm introducing a new machine model to simultaneously allow simple
2012-07-07 04:00:00 +00:00
CodeGenSchedule.h
I'm introducing a new machine model to simultaneously allow simple
2012-07-07 04:00:00 +00:00
CodeGenTarget.cpp
I'm introducing a new machine model to simultaneously allow simple
2012-07-07 04:00:00 +00:00
CodeGenTarget.h
I'm introducing a new machine model to simultaneously allow simple
2012-07-07 04:00:00 +00:00
DAGISelEmitter.cpp
Write llvm-tblgen backends as functions instead of sub-classes.
2012-06-11 15:37:55 +00:00
DAGISelMatcher.cpp
…
DAGISelMatcher.h
Fix a typo (the the => the)
2012-07-23 08:51:15 +00:00
DAGISelMatcherEmitter.cpp
TblGen: Tweak to pretty-print DAGISel.inc a bit better.
2012-07-18 22:41:03 +00:00
DAGISelMatcherGen.cpp
Teach TableGen to put chains on more instructions
2012-06-26 18:46:28 +00:00
DAGISelMatcherOpt.cpp
…
DFAPacketizerEmitter.cpp
Fix Windows build after r159281: s/iterator/const_iterator
2012-06-28 07:47:50 +00:00
DisassemblerEmitter.cpp
Write llvm-tblgen backends as functions instead of sub-classes.
2012-06-11 15:37:55 +00:00
EDEmitter.cpp
Make x86 asm parser to check for xmm vs ymm for index register in gather instructions. Also fix Intel syntax for gather instructions to use 'DWORD PTR' or 'QWORD PTR' to match gas.
2012-07-18 04:11:12 +00:00
FastISelEmitter.cpp
Write llvm-tblgen backends as functions instead of sub-classes.
2012-06-11 15:37:55 +00:00
FixedLenDecoderEmitter.cpp
Declare some for loop indices inside the for loop statement.
2012-08-17 05:42:16 +00:00
InstrInfoEmitter.cpp
Add an MCID::Select flag and TII hooks for optimizing selects.
2012-08-16 23:11:47 +00:00
IntrinsicEmitter.cpp
Write llvm-tblgen backends as functions instead of sub-classes.
2012-06-11 15:37:55 +00:00
LLVMBuild.txt
…
Makefile
…
PseudoLoweringEmitter.cpp
Write llvm-tblgen backends as functions instead of sub-classes.
2012-06-11 15:37:55 +00:00
RegisterInfoEmitter.cpp
Make synthesized sub-register indexes available in the target namespace.
2012-08-15 18:00:55 +00:00
SequenceToOffsetTable.h
enhance the intrinsic info stuff to emit encodings that don't fit in 32-bits into a
2012-05-17 15:55:41 +00:00
SetTheory.cpp
Teach tblgen's set theory "sequence" operator to support an optional stride operand.
2012-05-24 21:37:08 +00:00
SetTheory.h
…
StringToOffsetTable.h
Add some missing includes for the build against stdcxx.
2012-08-10 10:53:56 +00:00
SubtargetEmitter.cpp
Added MispredictPenalty to SchedMachineModel.
2012-08-08 02:44:16 +00:00
TableGen.cpp
Write llvm-tblgen backends as functions instead of sub-classes.
2012-06-11 15:37:55 +00:00
TableGenBackends.h
Write llvm-tblgen backends as functions instead of sub-classes.
2012-06-11 15:37:55 +00:00
TGValueTypes.cpp
…
X86DisassemblerShared.h
Add more indirection to the disassembler tables to reduce amount of space used to store the operand types and encodings. Store only the unique combinations in a separate table and store indices in the instruction table. Saves about 32K of static data.
2012-08-01 07:39:18 +00:00
X86DisassemblerTables.cpp
Add more indirection to the disassembler tables to reduce amount of space used to store the operand types and encodings. Store only the unique combinations in a separate table and store indices in the instruction table. Saves about 32K of static data.
2012-08-01 07:39:18 +00:00
X86DisassemblerTables.h
Remove trailing whitespace
2012-07-31 05:28:41 +00:00
X86ModRMFilters.cpp
…
X86ModRMFilters.h
…
X86RecognizableInstr.cpp
Mark MOVZX32_NOREX as isCodeGenOnly and neverHasSideEffects. The isCodeGenOnly change allows special detection of _NOREX instructions to be removed from tablegen disassembler code.
2012-07-30 06:48:11 +00:00
X86RecognizableInstr.h
Update GATHER instructions to support 2 read-write operands. Patch from myself and Manman Ren.
2012-07-12 06:52:41 +00:00