Craig Topper 8ae97baef2 Allow 256-bit shuffles to still be split even if only half of the shuffle comes from two 128-bit pieces. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157175 91177308-0d34-0410-b5e6-96231b3b80d8

2012-05-21 06:40:16 +00:00

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ARM

Transfer memory operands to the right instruction.

2012-05-20 06:38:42 +00:00

CellSPU

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CPP

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Generic

change the objectsize intrinsic signature: add a 3rd parameter to denote the maximum runtime performance penalty that the user is willing to accept.

2012-05-09 15:52:43 +00:00

Hexagon

Enable all Hexagon tests.

2012-05-15 16:13:12 +00:00

MBlaze

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Mips

Add support for the 'd' mips inline asm output modifier.

2012-05-19 00:51:56 +00:00

MSP430

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NVPTX

This patch adds a new NVPTX back-end to LLVM which supports code generation for NVIDIA PTX 3.0. This back-end will (eventually) replace the current PTX back-end, while maintaining compatibility with it.

2012-05-04 20:18:50 +00:00

PowerPC

Add a missing PPC 64-bit stwu pattern.

2012-05-20 17:11:24 +00:00

PTX

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SPARC

Regression test for PR2960.

2012-05-01 11:11:34 +00:00

Thumb

Make test less fragile.

2012-04-27 20:48:18 +00:00

Thumb2

Use the right register class for LDRrs.

2012-05-20 06:38:47 +00:00

X86

Allow 256-bit shuffles to still be split even if only half of the shuffle comes from two 128-bit pieces.

2012-05-21 06:40:16 +00:00

XCore

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