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https://github.com/c64scene-ar/llvm-6502.git
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4cac5facc3
Allow splats even if they don't match either of the original shuffles, possibly due to undef entries in the shuffles masks. Radar 8597790. Also fix some 80-column violations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117719 91177308-0d34-0410-b5e6-96231b3b80d8
100 lines
3.4 KiB
LLVM
100 lines
3.4 KiB
LLVM
; RUN: opt < %s -instcombine -S | FileCheck %s
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%T = type <4 x float>
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define %T @test1(%T %v1) {
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; CHECK: @test1
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; CHECK: ret %T %v1
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%v2 = shufflevector %T %v1, %T undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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ret %T %v2
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}
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define %T @test2(%T %v1) {
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; CHECK: @test2
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; CHECK: ret %T %v1
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%v2 = shufflevector %T %v1, %T %v1, <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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ret %T %v2
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}
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define float @test3(%T %A, %T %B, float %f) {
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; CHECK: @test3
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; CHECK: ret float %f
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%C = insertelement %T %A, float %f, i32 0
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%D = shufflevector %T %C, %T %B, <4 x i32> <i32 5, i32 0, i32 2, i32 7>
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%E = extractelement %T %D, i32 1
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ret float %E
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}
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define i32 @test4(<4 x i32> %X) {
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; CHECK: @test4
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; CHECK-NEXT: extractelement
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; CHECK-NEXT: ret
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%tmp152.i53899.i = shufflevector <4 x i32> %X, <4 x i32> undef, <4 x i32> zeroinitializer
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%tmp34 = extractelement <4 x i32> %tmp152.i53899.i, i32 0
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ret i32 %tmp34
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}
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define i32 @test5(<4 x i32> %X) {
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; CHECK: @test5
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; CHECK-NEXT: extractelement
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; CHECK-NEXT: ret
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%tmp152.i53899.i = shufflevector <4 x i32> %X, <4 x i32> undef, <4 x i32> <i32 3, i32 2, i32 undef, i32 undef>
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%tmp34 = extractelement <4 x i32> %tmp152.i53899.i, i32 0
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ret i32 %tmp34
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}
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define float @test6(<4 x float> %X) {
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; CHECK: @test6
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; CHECK-NEXT: extractelement
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; CHECK-NEXT: ret
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%X1 = bitcast <4 x float> %X to <4 x i32>
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%tmp152.i53899.i = shufflevector <4 x i32> %X1, <4 x i32> undef, <4 x i32> zeroinitializer
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%tmp152.i53900.i = bitcast <4 x i32> %tmp152.i53899.i to <4 x float>
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%tmp34 = extractelement <4 x float> %tmp152.i53900.i, i32 0
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ret float %tmp34
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}
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define <4 x float> @test7(<4 x float> %tmp45.i) {
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; CHECK: @test7
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; CHECK-NEXT: ret %T %tmp45.i
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%tmp1642.i = shufflevector <4 x float> %tmp45.i, <4 x float> undef, <4 x i32> < i32 0, i32 1, i32 6, i32 7 >
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ret <4 x float> %tmp1642.i
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}
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; This should turn into a single shuffle.
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define <4 x float> @test8(<4 x float> %tmp, <4 x float> %tmp1) {
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; CHECK: @test8
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; CHECK-NEXT: shufflevector
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; CHECK-NEXT: ret
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%tmp4 = extractelement <4 x float> %tmp, i32 1
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%tmp2 = extractelement <4 x float> %tmp, i32 3
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%tmp1.upgrd.1 = extractelement <4 x float> %tmp1, i32 0
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%tmp128 = insertelement <4 x float> undef, float %tmp4, i32 0
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%tmp130 = insertelement <4 x float> %tmp128, float undef, i32 1
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%tmp132 = insertelement <4 x float> %tmp130, float %tmp2, i32 2
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%tmp134 = insertelement <4 x float> %tmp132, float %tmp1.upgrd.1, i32 3
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ret <4 x float> %tmp134
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}
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; Test fold of two shuffles where the first shuffle vectors inputs are a
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; different length then the second.
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define <4 x i8> @test9(<16 x i8> %tmp6) nounwind {
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; CHECK: @test9
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; CHECK-NEXT: shufflevector
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; CHECK-NEXT: ret
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%tmp7 = shufflevector <16 x i8> %tmp6, <16 x i8> undef, <4 x i32> < i32 13, i32 9, i32 4, i32 13 > ; <<4 x i8>> [#uses=1]
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%tmp9 = shufflevector <4 x i8> %tmp7, <4 x i8> undef, <4 x i32> < i32 3, i32 1, i32 2, i32 0 > ; <<4 x i8>> [#uses=1]
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ret <4 x i8> %tmp9
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}
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; Redundant vector splats should be removed. Radar 8597790.
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define <4 x i32> @test10(<4 x i32> %tmp5) nounwind {
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; CHECK: @test10
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; CHECK-NEXT: shufflevector
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; CHECK-NEXT: ret
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%tmp6 = shufflevector <4 x i32> %tmp5, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
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%tmp7 = shufflevector <4 x i32> %tmp6, <4 x i32> undef, <4 x i32> zeroinitializer
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ret <4 x i32> %tmp7
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}
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