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https://github.com/c64scene-ar/llvm-6502.git
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4cae9cb034
We use gep to access the global array "switch.table", and the table index should be treated as unsigned. When the highest bit is 1, this commit zero-extends the index to an integer type with larger size. For a switch on i2, we used to generate: %switch.tableidx = sub i2 %0, -2 getelementptr inbounds [4 x i64]* @switch.table, i32 0, i2 %switch.tableidx It is incorrect when %switch.tableidx is 2 or 3. The fix is to generate %switch.tableidx = sub i2 %0, -2 %switch.tableidx.zext = zext i2 %switch.tableidx to i3 getelementptr inbounds [4 x i64]* @switch.table, i32 0, i3 %switch.tableidx.zext rdar://17735071 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213815 91177308-0d34-0410-b5e6-96231b3b80d8
42 lines
1.2 KiB
LLVM
42 lines
1.2 KiB
LLVM
; RUN: opt -S -simplifycfg < %s | FileCheck %s
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; rdar://17735071
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target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-apple-darwin12.0.0"
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; When tableindex can't fit into i2, we should extend the type to i3.
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; CHECK-LABEL: @_TFO6reduce1E5toRawfS0_FT_Si
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; CHECK: entry:
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; CHECK-NEXT: sub i2 %0, -2
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; CHECK-NEXT: zext i2 %switch.tableidx to i3
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; CHECK-NEXT: getelementptr inbounds [4 x i64]* @switch.table, i32 0, i3 %switch.tableidx.zext
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; CHECK-NEXT: load i64* %switch.gep
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; CHECK-NEXT: ret i64 %switch.load
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define i64 @_TFO6reduce1E5toRawfS0_FT_Si(i2) {
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entry:
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switch i2 %0, label %1 [
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i2 0, label %2
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i2 1, label %3
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i2 -2, label %4
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i2 -1, label %5
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]
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; <label>:1 ; preds = %entry
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unreachable
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; <label>:2 ; preds = %2
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br label %6
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; <label>:3 ; preds = %4
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br label %6
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; <label>:4 ; preds = %6
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br label %6
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; <label>:5 ; preds = %8
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br label %6
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; <label>:6 ; preds = %3, %5, %7, %9
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%7 = phi i64 [ 3, %5 ], [ 2, %4 ], [ 1, %3 ], [ 0, %2 ]
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ret i64 %7
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}
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