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llvm-6502/test/CodeGen/R600
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Christian Konig 4d0e8a8a3e R600/SI: dynamical figure out the reg class of MIMG 
Depending on the number of bits set in the writemask.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179166 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-10 08:39:16 +00:00
..
128bit-kernel-args.ll
R600: Add support for 128-bit parameters
2013-02-13 22:05:20 +00:00
add.v4i32.ll
Add R600 backend
2012-12-11 21:25:42 +00:00
alu-split.ll
R600: Fix last ALU of a clause being emitted in a separate clause
2013-04-03 18:24:47 +00:00
and.v4i32.ll
Add R600 backend
2012-12-11 21:25:42 +00:00
dagcombiner-bug-illegal-vec4-int-to-fp.ll
R600: Emit function name in the AsmPrinter
2013-02-05 17:09:11 +00:00
disconnected-predset-break-bug.ll
R600: Add support for native control flow
2013-04-01 21:48:05 +00:00
fabs.ll
Add R600 backend
2012-12-11 21:25:42 +00:00
fadd.ll
Add R600 backend
2012-12-11 21:25:42 +00:00
fadd.v4f32.ll
Add R600 backend
2012-12-11 21:25:42 +00:00
fcmp-cnd.ll
Add R600 backend
2012-12-11 21:25:42 +00:00
fcmp-cnde-int-args.ll
R600: Improve custom lowering of select_cc
2013-03-08 15:37:09 +00:00
fcmp.ll
R600: Change operation action from Custom to Expand for BR_CC
2013-03-08 15:37:07 +00:00
fdiv.v4f32.ll
R600: Turn BUILD_VECTOR into Reg_Sequence
2013-03-05 15:04:49 +00:00
floor.ll
Add R600 backend
2012-12-11 21:25:42 +00:00
fmad.ll
R600/SI: Use MULADD_IEEE/V_MAD_F32 instruction for mad pattern
2013-02-18 14:11:28 +00:00
fmax.ll
Add R600 backend
2012-12-11 21:25:42 +00:00
fmin.ll
Add R600 backend
2012-12-11 21:25:42 +00:00
fmul.ll
Add R600 backend
2012-12-11 21:25:42 +00:00
fmul.v4f32.ll
Add R600 backend
2012-12-11 21:25:42 +00:00
fsub.ll
R600: Fold clamp, neg, abs
2013-01-31 22:11:54 +00:00
fsub.v4f32.ll
Add R600 backend
2012-12-11 21:25:42 +00:00
i8_to_double_to_float.ll
Add R600 backend
2012-12-11 21:25:42 +00:00
icmp-select-sete-reverse-args.ll
Test case hygiene.
2013-03-09 18:25:40 +00:00
imm.ll
R600/SI: Add support for buffer stores v2
2013-04-05 23:31:51 +00:00
jump_address.ll
R600: Take export into account when computing cf address
2013-04-04 13:59:59 +00:00
kcache-fold.ll
R600: Emit CF_ALU and use true kcache register.
2013-04-01 21:47:42 +00:00
legalizedag-bug-expand-setcc.ll
LegalizeDAG: Respect the result of TLI.getBooleanContents() when expanding SETCC
2013-03-08 15:37:02 +00:00
lit.local.cfg
Add R600 backend
2012-12-11 21:25:42 +00:00
literals.ll
Test case hygiene.
2013-03-09 18:25:40 +00:00
llvm.AMDGPU.mul.ll
Add R600 backend
2012-12-11 21:25:42 +00:00
llvm.AMDGPU.tex.ll
R600: Add lit tests for texture sampling instruction selection.
2013-02-14 07:43:51 +00:00
llvm.AMDGPU.trunc.ll
Add R600 backend
2012-12-11 21:25:42 +00:00
llvm.cos.ll
Add R600 backend
2012-12-11 21:25:42 +00:00
llvm.pow.ll
R600: Fix up test/CodeGen/R600/llvm.pow.ll for r177730
2013-03-22 15:24:16 +00:00
llvm.SI.fs.interp.constant.ll
R600/SI: Add processor types for each SI variant
2013-04-05 23:31:35 +00:00
llvm.SI.sample.ll
R600/SI: dynamical figure out the reg class of MIMG
2013-04-10 08:39:16 +00:00
llvm.sin.ll
Add R600 backend
2012-12-11 21:25:42 +00:00
load.constant_addrspace.f32.ll
Add R600 backend
2012-12-11 21:25:42 +00:00
load.i8.ll
Add R600 backend
2012-12-11 21:25:42 +00:00
lshl.ll
R600/SI: Add processor types for each SI variant
2013-04-05 23:31:35 +00:00
lshr.ll
R600/SI: Add processor types for each SI variant
2013-04-05 23:31:35 +00:00
mulhu.ll
R600/SI: Add processor types for each SI variant
2013-04-05 23:31:35 +00:00
predicates.ll
R600: Add support for native control flow
2013-04-01 21:48:05 +00:00
reciprocal.ll
Add R600 backend
2012-12-11 21:25:42 +00:00
schedule-fs-loop-nested-if.ll
llvm/test/CodeGen/R600/schedule-*.ll: Let them require +Asserts.
2013-03-11 23:16:30 +00:00
schedule-fs-loop-nested.ll
llvm/test/CodeGen/R600/schedule-*.ll: Let them require +Asserts.
2013-03-11 23:16:30 +00:00
schedule-fs-loop.ll
llvm/test/CodeGen/R600/schedule-*.ll: Let them require +Asserts.
2013-03-11 23:16:30 +00:00
schedule-if-2.ll
llvm/test/CodeGen/R600/schedule-*.ll: Let them require +Asserts.
2013-03-11 23:16:30 +00:00
schedule-if.ll
llvm/test/CodeGen/R600/schedule-*.ll: Let them require +Asserts.
2013-03-11 23:16:30 +00:00
schedule-vs-if-nested-loop.ll
llvm/test/CodeGen/R600/schedule-*.ll: Let them require +Asserts.
2013-03-11 23:16:30 +00:00
sdiv.ll
Add R600 backend
2012-12-11 21:25:42 +00:00
selectcc_cnde_int.ll
Add R600 backend
2012-12-11 21:25:42 +00:00
selectcc_cnde.ll
Add R600 backend
2012-12-11 21:25:42 +00:00
selectcc-icmp-select-float.ll
R600: Fix assembly name for SETGT_INT
2013-02-07 14:02:27 +00:00
selectcc-opt.ll
R600: Optimize another selectcc case
2013-03-08 15:37:11 +00:00
set-dx10.ll
R600: Add support for SET*_DX10 instructions
2013-02-07 14:02:35 +00:00
setcc.v4i32.ll
Add R600 backend
2012-12-11 21:25:42 +00:00
seto.ll
R600/SI: Add processor types for each SI variant
2013-04-05 23:31:35 +00:00
setuo.ll
R600/SI: Add processor types for each SI variant
2013-04-05 23:31:35 +00:00
short-args.ll
R600: Emit function name in the AsmPrinter
2013-02-05 17:09:11 +00:00
store.ll
R600/SI: Add support for buffer stores v2
2013-04-05 23:31:51 +00:00
store.v4f32.ll
Add R600 backend
2012-12-11 21:25:42 +00:00
store.v4i32.ll
Add R600 backend
2012-12-11 21:25:42 +00:00
udiv.v4i32.ll
Add R600 backend
2012-12-11 21:25:42 +00:00
unsupported-cc.ll
R600: Add support for SET*_DX10 instructions
2013-02-07 14:02:35 +00:00
urem.v4i32.ll
Add R600 backend
2012-12-11 21:25:42 +00:00
vec4-expand.ll
R600: Emit function name in the AsmPrinter
2013-02-05 17:09:11 +00:00