mirror of
https://github.com/c64scene-ar/llvm-6502.git
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342e3161d9
register dependency (rather than glue them together). This is general goodness as it gives scheduler more freedom. However it is motivated by a nasty bug in isel. When a i64 sub is expanded to subc + sube. libcall #1 \ \ subc \ / \ \ / \ \ / libcall #2 sube If the libcalls are not serialized (i.e. both have chains which are dag entry), legalizer can serialize them in arbitrary orders. If it's unlucky, it can force libcall #2 before libcall #1 in the above case. subc | libcall #2 | libcall #1 | sube However since subc and sube are "glued" together, this ends up being a cycle when the scheduler combine subc and sube as a single scheduling unit. The right solution is to fix LegalizeType too chains the libcalls together. However, LegalizeType is not processing nodes in order so that's harder than it should be. For now, the move to physical register dependency will do. rdar://10019576 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138791 91177308-0d34-0410-b5e6-96231b3b80d8
129 lines
6.4 KiB
LLVM
129 lines
6.4 KiB
LLVM
; RUN: opt < %s -std-compile-opts | \
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; RUN: llc -mtriple=thumbv7-apple-darwin10 -mattr=+neon | FileCheck %s
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define void @fred(i32 %three_by_three, i8* %in, double %dt1, i32 %x_size, i32 %y_size, i8* %bp) nounwind {
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entry:
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; -- The loop following the load should only use a single add-literation
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; instruction.
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; CHECK: ldr.64
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; CHECK: adds r{{[0-9]+}}, r{{[0-9]+}}, #1
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; CHECK-NOT: adds r{{[0-9]+}}, r{{[0-9]+}}, #1
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; CHECK: subsections_via_symbols
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%three_by_three_addr = alloca i32 ; <i32*> [#uses=2]
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%in_addr = alloca i8* ; <i8**> [#uses=2]
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%dt_addr = alloca float ; <float*> [#uses=4]
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%x_size_addr = alloca i32 ; <i32*> [#uses=2]
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%y_size_addr = alloca i32 ; <i32*> [#uses=1]
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%bp_addr = alloca i8* ; <i8**> [#uses=1]
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%tmp_image = alloca i8* ; <i8**> [#uses=0]
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%out = alloca i8* ; <i8**> [#uses=1]
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%cp = alloca i8* ; <i8**> [#uses=0]
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%dpt = alloca i8* ; <i8**> [#uses=4]
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%dp = alloca i8* ; <i8**> [#uses=2]
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%ip = alloca i8* ; <i8**> [#uses=0]
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%centre = alloca i32 ; <i32*> [#uses=0]
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%tmp = alloca i32 ; <i32*> [#uses=0]
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%brightness = alloca i32 ; <i32*> [#uses=0]
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%area = alloca i32 ; <i32*> [#uses=0]
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%y = alloca i32 ; <i32*> [#uses=0]
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%x = alloca i32 ; <i32*> [#uses=2]
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%j = alloca i32 ; <i32*> [#uses=6]
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%i = alloca i32 ; <i32*> [#uses=1]
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%mask_size = alloca i32 ; <i32*> [#uses=5]
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%increment = alloca i32 ; <i32*> [#uses=1]
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%n_max = alloca i32 ; <i32*> [#uses=4]
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%temp = alloca float ; <float*> [#uses=1]
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%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
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store i32 %three_by_three, i32* %three_by_three_addr
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store i8* %in, i8** %in_addr
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%dt = fptrunc double %dt1 to float ; <float> [#uses=1]
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store float %dt, float* %dt_addr
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store i32 %x_size, i32* %x_size_addr
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store i32 %y_size, i32* %y_size_addr
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store i8* %bp, i8** %bp_addr
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%0 = load i8** %in_addr, align 4 ; <i8*> [#uses=1]
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store i8* %0, i8** %out, align 4
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%1 = call i32 (...)* @foo() nounwind ; <i32> [#uses=1]
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store i32 %1, i32* %i, align 4
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%2 = load i32* %three_by_three_addr, align 4 ; <i32> [#uses=1]
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%3 = icmp eq i32 %2, 0 ; <i1> [#uses=1]
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br i1 %3, label %bb, label %bb2
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bb: ; preds = %entry
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%4 = load float* %dt_addr, align 4 ; <float> [#uses=1]
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%5 = fpext float %4 to double ; <double> [#uses=1]
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%6 = fmul double %5, 1.500000e+00 ; <double> [#uses=1]
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%7 = fptosi double %6 to i32 ; <i32> [#uses=1]
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%8 = add nsw i32 %7, 1 ; <i32> [#uses=1]
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store i32 %8, i32* %mask_size, align 4
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br label %bb3
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bb2: ; preds = %entry
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store i32 1, i32* %mask_size, align 4
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br label %bb3
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bb3: ; preds = %bb2, %bb
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%9 = load i32* %mask_size, align 4 ; <i32> [#uses=1]
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%10 = mul i32 %9, 2 ; <i32> [#uses=1]
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%11 = add nsw i32 %10, 1 ; <i32> [#uses=1]
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store i32 %11, i32* %n_max, align 4
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%12 = load i32* %x_size_addr, align 4 ; <i32> [#uses=1]
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%13 = load i32* %n_max, align 4 ; <i32> [#uses=1]
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%14 = sub i32 %12, %13 ; <i32> [#uses=1]
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store i32 %14, i32* %increment, align 4
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%15 = load i32* %n_max, align 4 ; <i32> [#uses=1]
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%16 = load i32* %n_max, align 4 ; <i32> [#uses=1]
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%17 = mul i32 %15, %16 ; <i32> [#uses=1]
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%18 = call noalias i8* @malloc(i32 %17) nounwind ; <i8*> [#uses=1]
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store i8* %18, i8** %dp, align 4
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%19 = load i8** %dp, align 4 ; <i8*> [#uses=1]
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store i8* %19, i8** %dpt, align 4
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%20 = load float* %dt_addr, align 4 ; <float> [#uses=1]
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%21 = load float* %dt_addr, align 4 ; <float> [#uses=1]
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%22 = fmul float %20, %21 ; <float> [#uses=1]
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%23 = fsub float -0.000000e+00, %22 ; <float> [#uses=1]
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store float %23, float* %temp, align 4
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%24 = load i32* %mask_size, align 4 ; <i32> [#uses=1]
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%25 = sub i32 0, %24 ; <i32> [#uses=1]
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store i32 %25, i32* %j, align 4
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br label %bb5
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bb4: ; preds = %bb5
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%26 = load i32* %j, align 4 ; <i32> [#uses=1]
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%27 = load i32* %j, align 4 ; <i32> [#uses=1]
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%28 = mul i32 %26, %27 ; <i32> [#uses=1]
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%29 = sitofp i32 %28 to double ; <double> [#uses=1]
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%30 = fmul double %29, 1.234000e+00 ; <double> [#uses=1]
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%31 = fptosi double %30 to i32 ; <i32> [#uses=1]
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store i32 %31, i32* %x, align 4
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%32 = load i32* %x, align 4 ; <i32> [#uses=1]
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%33 = trunc i32 %32 to i8 ; <i8> [#uses=1]
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%34 = load i8** %dpt, align 4 ; <i8*> [#uses=1]
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store i8 %33, i8* %34, align 1
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%35 = load i8** %dpt, align 4 ; <i8*> [#uses=1]
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%36 = getelementptr inbounds i8* %35, i64 1 ; <i8*> [#uses=1]
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store i8* %36, i8** %dpt, align 4
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%37 = load i32* %j, align 4 ; <i32> [#uses=1]
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%38 = add nsw i32 %37, 1 ; <i32> [#uses=1]
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store i32 %38, i32* %j, align 4
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br label %bb5
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bb5: ; preds = %bb4, %bb3
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%39 = load i32* %j, align 4 ; <i32> [#uses=1]
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%40 = load i32* %mask_size, align 4 ; <i32> [#uses=1]
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%41 = icmp sle i32 %39, %40 ; <i1> [#uses=1]
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br i1 %41, label %bb4, label %bb6
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bb6: ; preds = %bb5
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br label %return
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return: ; preds = %bb6
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ret void
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}
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declare i32 @foo(...)
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declare noalias i8* @malloc(i32) nounwind
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