llvm-6502/test/CodeGen
Dan Gohman 4e8a98519e Remove the code from IVUsers that attempted to handle
casted induction variables in cases where the cast
isn't foldable. It ended up being a pessimization in
many cases. This could be fixed, but it would require
a bunch of complicated code in IVUsers' clients. The
advantages of this approach aren't visible enough to
justify it at this time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73706 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-18 16:54:06 +00:00
..
Alpha
ARM Initial support for some Thumb2 instructions. 2009-06-17 18:13:58 +00:00
CBackend Fix an erroneous check for isFNeg; the FNeg case is handled 2009-06-04 23:43:29 +00:00
CellSPU Add some generic expansion logic for SMULO and UMULO. Fixes UMULO 2009-06-16 06:58:29 +00:00
CPP Fix code emission for conditional branches. 2009-05-04 19:10:38 +00:00
Generic Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00
IA64
Mips Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00
MSP430 Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00
PowerPC Add some generic expansion logic for SMULO and UMULO. Fixes UMULO 2009-06-16 06:58:29 +00:00
SPARC Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00
X86 Remove the code from IVUsers that attempted to handle 2009-06-18 16:54:06 +00:00
XCore Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00