Tim Northover d4b4f400e8 AArch64/ARM64: disentangle the "B.CC" and "LDR lit" operands ...

These can have different relocations in ELF. In particular both:

    b.eq global
    ldr x0, global

are valid, giving different relocations. The only possible way to distinguish
them is via a different fixup, so the operands had to be separated throughout
the backend.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207105 91177308-0d34-0410-b5e6-96231b3b80d8

2014-04-24 12:12:10 +00:00

..

adr.s

[ARM64] Fixup ADR/ADRP parsing such that they accept immediates and all labels types

2014-04-09 14:44:12 +00:00

advsimd.s

[ARM64] Enable feature predicates for NEON / FP / CRYPTO.

2014-04-23 06:22:48 +00:00

aliases.s

[ARM64] Enable feature predicates for NEON / FP / CRYPTO.

2014-04-23 06:22:48 +00:00

arithmetic-encoding.s

[ARM64] Enable feature predicates for NEON / FP / CRYPTO.

2014-04-23 06:22:48 +00:00

arm64-fixup.s

…

basic-a64-instructions.s

…

bitfield-encoding.s

[ARM64] Add WZR to isGPR32Register, since every use needs to check for this anyway.

2014-04-09 14:42:49 +00:00

branch-encoding.s

AArch64/ARM64: disentangle the "B.CC" and "LDR lit" operands

2014-04-24 12:12:10 +00:00

crypto.s

[ARM64] Enable feature predicates for NEON / FP / CRYPTO.

2014-04-23 06:22:48 +00:00

diagno-predicate.s

[ARM64] Enable feature predicates for NEON / FP / CRYPTO.

2014-04-23 06:22:48 +00:00

diags.s

AArch64/ARM64: disentangle the "B.CC" and "LDR lit" operands

2014-04-24 12:12:10 +00:00

directive_loh.s

…

elf-reloc-condbr.s

MC: move ARM64 test from AArch64 directory

2014-04-23 21:29:40 +00:00

elf-relocs.s

[ARM64] Rename LR to the UAL-compliant 'X30'.

2014-04-09 14:43:59 +00:00

fp-encoding.s

[ARM64] Enable feature predicates for NEON / FP / CRYPTO.

2014-04-23 06:22:48 +00:00

large-relocs.s

AArch64/ARM64: only mangle MOVZ/MOVN during encoding when needed

2014-04-15 14:00:15 +00:00

lit.local.cfg

…

logical-encoding.s

…

mapping-across-sections.s

…

mapping-within-section.s

…

memory.s

ARM64: [su]xtw use W regs as inputs, not X regs.

2014-04-17 20:47:31 +00:00

nv-cond.s

[ARM64] Enable feature predicates for NEON / FP / CRYPTO.

2014-04-23 06:22:48 +00:00

optional-hash.s

Optional hash symbol feature support for ARM64

2014-04-15 11:43:09 +00:00

separator.s

Fix some doc and comment typos

2014-04-09 14:47:27 +00:00

simd-ldst.s

[ARM64] Enable feature predicates for NEON / FP / CRYPTO.

2014-04-23 06:22:48 +00:00

small-data-fixups.s

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spsel-sysreg.s

[ARM64] Rework system register parsing to overcome SPSel clash in MSR variants.

2014-04-09 14:43:06 +00:00

system-encoding.s

[ARM64] Switch the decoder, disassembler, instprinter and asmparser over to using AArch64-style system registers, and fix up test failures discovered in the process.

2014-04-09 14:42:36 +00:00

tls-modifiers-darwin.s

[ARM64] Rename LR to the UAL-compliant 'X30'.

2014-04-09 14:43:59 +00:00

tls-relocs.s

AArch64/ARM64: disentangle the "B.CC" and "LDR lit" operands

2014-04-24 12:12:10 +00:00

variable-exprs.s

…

vector-lists.s

[ARM64] Enable feature predicates for NEON / FP / CRYPTO.

2014-04-23 06:22:48 +00:00

verbose-vector-case.s

[ARM64] Enable feature predicates for NEON / FP / CRYPTO.

2014-04-23 06:22:48 +00:00