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llvm-6502/lib/Target/SparcV8
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Chris Lattner 1d6dc97463 I think that V8 should coallesce registers, don't you? 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15192 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-25 06:19:04 +00:00
..
DelaySlotFiller.cpp Add floating-point branches and compares. Compares don't complete 2004-07-08 09:08:22 +00:00
InstSelectSimple.cpp CPR fixes 2004-07-18 07:26:17 +00:00
Makefile
README.txt Add to-do list. 2004-07-16 10:31:36 +00:00
SparcV8.h
SparcV8.td
SparcV8AsmPrinter.cpp CPR fixes 2004-07-18 07:26:17 +00:00
SparcV8CodeEmitter.cpp
SparcV8InstrInfo_F2.td
SparcV8InstrInfo_F3.td Clean up the commented-out F3_3 stuff. 2004-06-18 06:28:21 +00:00
SparcV8InstrInfo.cpp I think that V8 should coallesce registers, don't you? 2004-07-25 06:19:04 +00:00
SparcV8InstrInfo.h I think that V8 should coallesce registers, don't you? 2004-07-25 06:19:04 +00:00
SparcV8InstrInfo.td Add a class for pseudo-instructions. Use it. 2004-07-16 10:32:10 +00:00
SparcV8ISelSimple.cpp CPR fixes 2004-07-18 07:26:17 +00:00
SparcV8JITInfo.h
SparcV8RegisterInfo.cpp Add #includes 2004-07-04 17:19:21 +00:00
SparcV8RegisterInfo.h
SparcV8RegisterInfo.td Make the double-fp pseudo registers be "NamedRegs". 2004-06-24 09:23:21 +00:00
SparcV8TargetMachine.cpp Delete the allocate*TargetMachine function, which is now dead . 2004-07-11 04:17:10 +00:00
SparcV8TargetMachine.h

README.txt 

SparcV8 backend skeleton
------------------------

This directory will house a 32-bit SPARC V8 backend employing a expander-based
instruction selector.  Watch this space for more news coming soon!

To-do
-----

* support 64-bit arguments to functions
* support setcc on longs
* support basic binary operations on longs
* support cast bool, int to long
* support sub, setcc constant expressions

$Date$