Jiangning Liu 0282fe6d91 For AArch64 back-end instruction selection, lower Neon_Lowxxx with EXTRCT_SUBREG. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195408 91177308-0d34-0410-b5e6-96231b3b80d8

2013-11-22 02:45:13 +00:00

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Analysis

Don't speculate loads under ThreadSanitizer

2013-11-21 07:29:28 +00:00

AsmParser

Make it explicit that nulls are not allowed in names.

2013-11-19 21:12:39 +00:00

Bitcode

Fix spacing, forward declare order.

2013-11-18 02:51:33 +00:00

CodeGen

SelectionDAG: Optimize expansion of vec_type = BITCAST scalar_type

2013-11-22 00:41:05 +00:00

DebugInfo

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ExecutionEngine

[mips] Resolve relocation for the stubs in MCJIT when load address is known

2013-11-19 21:56:00 +00:00

IR

[PM] Switch analysis managers to be threaded through the run methods

2013-11-22 00:43:29 +00:00

IRReader

[llvm-c] Expose IRReader interface

2013-11-06 09:21:15 +00:00

Linker

Revert "Move copying of global initializers below the cloning of functions."

2013-11-09 00:43:18 +00:00

LTO

Use array_pod_sort instead of std::sort

2013-11-16 16:15:56 +00:00

MC

Support multiple COFF sections with the same name but different COMDAT.

2013-11-19 19:52:52 +00:00

Object

Path: Recognize COFF import library file magic.

2013-11-15 21:22:02 +00:00

Option

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Support

revert r194655

2013-11-21 00:20:10 +00:00

TableGen

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Target

For AArch64 back-end instruction selection, lower Neon_Lowxxx with EXTRCT_SUBREG.

2013-11-22 02:45:13 +00:00

Transforms

SLP Vectorizer: Extract cost will only be added once even if the scalar has multiple external uses.

2013-11-22 01:57:02 +00:00

CMakeLists.txt

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LLVMBuild.txt

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Makefile

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