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0c190ad93f
- check that -mcpu=slm uses the call register indirect optimization - check that -mcpu=slm runs the scheduler - check that -mcpu=slm supports the movbe instruction git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190814 91177308-0d34-0410-b5e6-96231b3b80d8
34 lines
922 B
LLVM
34 lines
922 B
LLVM
; RUN: llc <%s -O2 -mcpu=atom -march=x86 -relocation-model=static | FileCheck -check-prefix=atom %s
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; RUN: llc <%s -O2 -mcpu=slm -march=x86 -relocation-model=static | FileCheck -check-prefix=slm %s
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; RUN: llc <%s -O2 -mcpu=core2 -march=x86 -relocation-model=static | FileCheck %s
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;
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@a = common global i32 0, align 4
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@b = common global i32 0, align 4
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@c = common global i32 0, align 4
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@d = common global i32 0, align 4
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@e = common global i32 0, align 4
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@f = common global i32 0, align 4
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define void @func() nounwind uwtable {
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; atom: imull
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; atom-NOT: movl
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; atom: imull
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; slm: imull
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; slm-NOT: movl
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; slm: imull
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; CHECK: imull
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; CHECK: movl
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; CHECK: imull
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entry:
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%0 = load i32* @b, align 4
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%1 = load i32* @c, align 4
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%mul = mul nsw i32 %0, %1
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store i32 %mul, i32* @a, align 4
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%2 = load i32* @e, align 4
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%3 = load i32* @f, align 4
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%mul1 = mul nsw i32 %2, %3
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store i32 %mul1, i32* @d, align 4
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ret void
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}
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