Arnold Schwaighofer 5193e4ebe2 ARM cost model: Fix costs for some vector selects ... I was too pessimistic in r177105. Vector selects that fit into a legal register type lower just fine. I was mislead by the code fragment that I was using. The stores/loads that I saw in those cases came from lowering the conditional off an address. Changing the code fragment to: %T0_3 = type <8 x i18> %T1_3 = type <8 x i1> define void @func_blend3(%T0_3* %loadaddr, %T0_3* %loadaddr2, %T1_3* %blend, %T0_3* %storeaddr) { %v0 = load %T0_3* %loadaddr %v1 = load %T0_3* %loadaddr2 ==> FROM: ;%c = load %T1_3* %blend ==> TO: %c = icmp slt %T0_3 %v0, %v1 ==> USE: %r = select %T1_3 %c, %T0_3 %v0, %T0_3 %v1 store %T0_3 %r, %T0_3* %storeaddr ret void } revealed this mistake. radar://13403975 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177170 91177308-0d34-0410-b5e6-96231b3b80d8		2013-03-15 18:31:01 +00:00
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Analysis	Small fix for cost analysis of ptrtoint.	2013-03-12 13:18:30 +00:00
Archive
AsmParser
Bitcode
CodeGen	Move estimateStackSize from ARM into MachineFrameInfo	2013-03-14 21:15:20 +00:00
DebugInfo
ExecutionEngine
IR	Remove the unused 4th operand for DIFile debug info metadata	2013-03-13 22:05:21 +00:00
Linker	Clean up out-of-date comments and some stray whitespace	2013-03-08 22:29:44 +00:00
MC	Fix the FDE encoding to be relative on ELF.	2013-03-15 05:51:57 +00:00
Object
Option
Support	Android uses cacheflush(long start, long end, long flags) for MIPS.	2013-03-14 19:01:00 +00:00
TableGen
Target	ARM cost model: Fix costs for some vector selects	2013-03-15 18:31:01 +00:00
Transforms	LoopVectorize: Invert case when we use a vector cmp value to query select cost	2013-03-14 18:54:36 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile