mirror of
https://github.com/c64scene-ar/llvm-6502.git
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597f81fea2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@3694 91177308-0d34-0410-b5e6-96231b3b80d8
502 lines
18 KiB
C++
502 lines
18 KiB
C++
//===-- InstrSelectionSupport.cpp -----------------------------------------===//
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//
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// Target-independent instruction selection code. See SparcInstrSelection.cpp
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// for usage.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/InstrSelectionSupport.h"
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#include "llvm/CodeGen/InstrSelection.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineInstrAnnot.h"
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#include "llvm/CodeGen/MachineCodeForInstruction.h"
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#include "llvm/CodeGen/MachineCodeForMethod.h"
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#include "llvm/CodeGen/InstrForest.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/MachineRegInfo.h"
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#include "llvm/Constants.h"
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#include "llvm/Function.h"
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#include "llvm/Type.h"
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#include "llvm/iMemory.h"
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using std::vector;
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//*************************** Local Functions ******************************/
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// Generate code to load the constant into a TmpInstruction (virtual reg) and
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// returns the virtual register.
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//
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static TmpInstruction*
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InsertCodeToLoadConstant(Function *F,
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Value* opValue,
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Instruction* vmInstr,
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vector<MachineInstr*>& loadConstVec,
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TargetMachine& target)
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{
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// Create a tmp virtual register to hold the constant.
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TmpInstruction* tmpReg = new TmpInstruction(opValue);
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MachineCodeForInstruction &mcfi = MachineCodeForInstruction::get(vmInstr);
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mcfi.addTemp(tmpReg);
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target.getInstrInfo().CreateCodeToLoadConst(target, F, opValue, tmpReg,
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loadConstVec, mcfi);
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// Record the mapping from the tmp VM instruction to machine instruction.
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// Do this for all machine instructions that were not mapped to any
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// other temp values created by
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// tmpReg->addMachineInstruction(loadConstVec.back());
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return tmpReg;
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}
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//---------------------------------------------------------------------------
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// Function GetConstantValueAsUnsignedInt
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// Function GetConstantValueAsSignedInt
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//
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// Convenience functions to get the value of an integral constant, for an
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// appropriate integer or non-integer type that can be held in a signed
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// or unsigned integer respectively. The type of the argument must be
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// the following:
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// Signed or unsigned integer
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// Boolean
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// Pointer
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//
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// isValidConstant is set to true if a valid constant was found.
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//---------------------------------------------------------------------------
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uint64_t
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GetConstantValueAsUnsignedInt(const Value *V,
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bool &isValidConstant)
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{
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isValidConstant = true;
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if (isa<Constant>(V))
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if (const ConstantBool *CB = dyn_cast<ConstantBool>(V))
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return (int64_t)CB->getValue();
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else if (const ConstantSInt *CS = dyn_cast<ConstantSInt>(V))
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return (uint64_t)CS->getValue();
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else if (const ConstantUInt *CU = dyn_cast<ConstantUInt>(V))
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return CU->getValue();
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isValidConstant = false;
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return 0;
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}
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int64_t
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GetConstantValueAsSignedInt(const Value *V,
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bool &isValidConstant)
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{
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uint64_t C = GetConstantValueAsUnsignedInt(V, isValidConstant);
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if (isValidConstant) {
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if (V->getType()->isSigned() || C < INT64_MAX) // safe to cast to signed
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return (int64_t) C;
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else
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isValidConstant = false;
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}
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return 0;
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}
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//---------------------------------------------------------------------------
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// Function: FoldGetElemChain
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//
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// Purpose:
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// Fold a chain of GetElementPtr instructions containing only
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// constant offsets into an equivalent (Pointer, IndexVector) pair.
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// Returns the pointer Value, and stores the resulting IndexVector
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// in argument chainIdxVec. This is a helper function for
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// FoldConstantIndices that does the actual folding.
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//---------------------------------------------------------------------------
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static Value*
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FoldGetElemChain(InstrTreeNode* ptrNode, vector<Value*>& chainIdxVec)
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{
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InstructionNode* gepNode = dyn_cast<InstructionNode>(ptrNode);
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GetElementPtrInst* gepInst =
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dyn_cast_or_null<GetElementPtrInst>(gepNode ? gepNode->getInstruction() :0);
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// ptr value is not computed in this tree or ptr value does not come from GEP
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// instruction
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if (gepInst == NULL)
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return NULL;
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// Return NULL if we don't fold any instructions in.
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Value* ptrVal = NULL;
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// Remember if the last instruction had a leading [0] index.
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bool hasLeadingZero = false;
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// Now chase the chain of getElementInstr instructions, if any.
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// Check for any non-constant indices and stop there.
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//
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InstructionNode* ptrChild = gepNode;
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while (ptrChild && (ptrChild->getOpLabel() == Instruction::GetElementPtr ||
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ptrChild->getOpLabel() == GetElemPtrIdx))
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{
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// Child is a GetElemPtr instruction
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gepInst = cast<GetElementPtrInst>(ptrChild->getValue());
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User::op_iterator OI, firstIdx = gepInst->idx_begin();
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User::op_iterator lastIdx = gepInst->idx_end();
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bool allConstantOffsets = true;
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// Check that all offsets are constant for this instruction
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for (OI = firstIdx; allConstantOffsets && OI != lastIdx; ++OI)
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allConstantOffsets = isa<ConstantInt>(*OI);
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if (allConstantOffsets)
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{ // Get pointer value out of ptrChild.
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ptrVal = gepInst->getPointerOperand();
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// Check for a leading [0] index, if any. It will be discarded later.
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hasLeadingZero = (*firstIdx ==
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Constant::getNullValue((*firstIdx)->getType()));
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// Insert its index vector at the start, skipping any leading [0]
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chainIdxVec.insert(chainIdxVec.begin(),
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firstIdx + hasLeadingZero, lastIdx);
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// Mark the folded node so no code is generated for it.
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((InstructionNode*) ptrChild)->markFoldedIntoParent();
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}
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else // cannot fold this getElementPtr instr. or any further ones
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break;
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ptrChild = dyn_cast<InstructionNode>(ptrChild->leftChild());
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}
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// If the first getElementPtr instruction had a leading [0], add it back.
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// Note that this instruction is the *last* one successfully folded above.
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if (ptrVal && hasLeadingZero)
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chainIdxVec.insert(chainIdxVec.begin(), ConstantSInt::get(Type::LongTy,0));
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return ptrVal;
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}
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//---------------------------------------------------------------------------
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// Function: GetMemInstArgs
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//
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// Purpose:
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// Get the pointer value and the index vector for a memory operation
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// (GetElementPtr, Load, or Store). If all indices of the given memory
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// operation are constant, fold in constant indices in a chain of
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// preceding GetElementPtr instructions (if any), and return the
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// pointer value of the first instruction in the chain.
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// All folded instructions are marked so no code is generated for them.
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//
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// Return values:
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// Returns the pointer Value to use.
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// Returns the resulting IndexVector in idxVec.
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// Returns true/false in allConstantIndices if all indices are/aren't const.
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//---------------------------------------------------------------------------
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// Check for a constant (uint) 0.
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inline bool
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IsZero(Value* idx)
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{
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return (isa<ConstantInt>(idx) && cast<ConstantInt>(idx)->isNullValue());
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}
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Value*
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GetMemInstArgs(const InstructionNode* memInstrNode,
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vector<Value*>& idxVec,
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bool& allConstantIndices)
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{
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allConstantIndices = true;
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Instruction* memInst = memInstrNode->getInstruction();
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// If there is a GetElemPtr instruction to fold in to this instr,
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// it must be in the left child for Load and GetElemPtr, and in the
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// right child for Store instructions.
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InstrTreeNode* ptrChild = (memInst->getOpcode() == Instruction::Store
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? memInstrNode->rightChild()
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: memInstrNode->leftChild());
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// Default pointer is the one from the current instruction.
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Value* ptrVal = ptrChild->getValue();
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// GEP is the only indexed memory instruction. gepI is used below.
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GetElementPtrInst* gepI = dyn_cast<GetElementPtrInst>(memInst);
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// If memInst is a GEP, check if all indices are constant for this instruction
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if (gepI)
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for (User::op_iterator OI=gepI->idx_begin(), OE=gepI->idx_end();
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allConstantIndices && OI != OE; ++OI)
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if (! isa<Constant>(*OI))
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allConstantIndices = false; // note: this also terminates loop!
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// If we have only constant indices, fold chains of constant indices
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// in this and any preceding GetElemPtr instructions.
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bool foldedGEPs = false;
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if (allConstantIndices)
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if (Value* newPtr = FoldGetElemChain(ptrChild, idxVec))
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{
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ptrVal = newPtr;
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foldedGEPs = true;
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assert((!gepI || IsZero(*gepI->idx_begin())) && "1st index not 0");
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}
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// Append the index vector of the current instruction, if any.
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// Skip the leading [0] index if preceding GEPs were folded into this.
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if (gepI)
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idxVec.insert(idxVec.end(), gepI->idx_begin() +foldedGEPs, gepI->idx_end());
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return ptrVal;
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}
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//------------------------------------------------------------------------
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// Function Set2OperandsFromInstr
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// Function Set3OperandsFromInstr
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//
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// For the common case of 2- and 3-operand arithmetic/logical instructions,
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// set the m/c instr. operands directly from the VM instruction's operands.
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// Check whether the first or second operand is 0 and can use a dedicated "0"
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// register.
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// Check whether the second operand should use an immediate field or register.
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// (First and third operands are never immediates for such instructions.)
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//
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// Arguments:
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// canDiscardResult: Specifies that the result operand can be discarded
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// by using the dedicated "0"
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//
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// op1position, op2position and resultPosition: Specify in which position
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// in the machine instruction the 3 operands (arg1, arg2
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// and result) should go.
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//
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//------------------------------------------------------------------------
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void
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Set2OperandsFromInstr(MachineInstr* minstr,
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InstructionNode* vmInstrNode,
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const TargetMachine& target,
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bool canDiscardResult,
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int op1Position,
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int resultPosition)
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{
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Set3OperandsFromInstr(minstr, vmInstrNode, target,
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canDiscardResult, op1Position,
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/*op2Position*/ -1, resultPosition);
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}
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void
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Set3OperandsFromInstr(MachineInstr* minstr,
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InstructionNode* vmInstrNode,
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const TargetMachine& target,
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bool canDiscardResult,
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int op1Position,
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int op2Position,
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int resultPosition)
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{
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assert(op1Position >= 0);
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assert(resultPosition >= 0);
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// operand 1
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minstr->SetMachineOperandVal(op1Position, MachineOperand::MO_VirtualRegister,
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vmInstrNode->leftChild()->getValue());
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// operand 2 (if any)
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if (op2Position >= 0)
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minstr->SetMachineOperandVal(op2Position, MachineOperand::MO_VirtualRegister,
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vmInstrNode->rightChild()->getValue());
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// result operand: if it can be discarded, use a dead register if one exists
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if (canDiscardResult && target.getRegInfo().getZeroRegNum() >= 0)
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minstr->SetMachineOperandReg(resultPosition,
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target.getRegInfo().getZeroRegNum());
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else
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minstr->SetMachineOperandVal(resultPosition,
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MachineOperand::MO_VirtualRegister, vmInstrNode->getValue());
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}
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MachineOperand::MachineOperandType
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ChooseRegOrImmed(Value* val,
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MachineOpCode opCode,
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const TargetMachine& target,
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bool canUseImmed,
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unsigned int& getMachineRegNum,
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int64_t& getImmedValue)
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{
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MachineOperand::MachineOperandType opType =
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MachineOperand::MO_VirtualRegister;
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getMachineRegNum = 0;
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getImmedValue = 0;
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// Check for the common case first: argument is not constant
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//
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Constant *CPV = dyn_cast<Constant>(val);
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if (!CPV) return opType;
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if (ConstantBool *CPB = dyn_cast<ConstantBool>(CPV))
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{
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if (!CPB->getValue() && target.getRegInfo().getZeroRegNum() >= 0)
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{
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getMachineRegNum = target.getRegInfo().getZeroRegNum();
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return MachineOperand::MO_MachineRegister;
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}
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getImmedValue = 1;
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return MachineOperand::MO_SignExtendedImmed;
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}
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// Otherwise it needs to be an integer or a NULL pointer
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if (! CPV->getType()->isInteger() &&
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! (isa<PointerType>(CPV->getType()) &&
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CPV->isNullValue()))
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return opType;
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// Now get the constant value and check if it fits in the IMMED field.
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// Take advantage of the fact that the max unsigned value will rarely
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// fit into any IMMED field and ignore that case (i.e., cast smaller
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// unsigned constants to signed).
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//
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int64_t intValue;
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if (isa<PointerType>(CPV->getType()))
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{
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intValue = 0;
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}
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else if (CPV->getType()->isSigned())
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{
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intValue = cast<ConstantSInt>(CPV)->getValue();
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}
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else
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{
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uint64_t V = cast<ConstantUInt>(CPV)->getValue();
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if (V >= INT64_MAX) return opType;
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intValue = (int64_t)V;
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}
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if (intValue == 0 && target.getRegInfo().getZeroRegNum() >= 0)
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{
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opType = MachineOperand::MO_MachineRegister;
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getMachineRegNum = target.getRegInfo().getZeroRegNum();
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}
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else if (canUseImmed &&
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target.getInstrInfo().constantFitsInImmedField(opCode, intValue))
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{
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opType = CPV->getType()->isSigned()
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? MachineOperand::MO_SignExtendedImmed
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: MachineOperand::MO_UnextendedImmed;
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getImmedValue = intValue;
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}
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return opType;
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}
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//---------------------------------------------------------------------------
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// Function: FixConstantOperandsForInstr
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//
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// Purpose:
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// Special handling for constant operands of a machine instruction
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// -- if the constant is 0, use the hardwired 0 register, if any;
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// -- if the constant fits in the IMMEDIATE field, use that field;
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// -- else create instructions to put the constant into a register, either
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// directly or by loading explicitly from the constant pool.
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//
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// In the first 2 cases, the operand of `minstr' is modified in place.
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// Returns a vector of machine instructions generated for operands that
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// fall under case 3; these must be inserted before `minstr'.
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//---------------------------------------------------------------------------
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vector<MachineInstr*>
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FixConstantOperandsForInstr(Instruction* vmInstr,
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MachineInstr* minstr,
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TargetMachine& target)
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{
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vector<MachineInstr*> loadConstVec;
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const MachineInstrDescriptor& instrDesc =
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target.getInstrInfo().getDescriptor(minstr->getOpCode());
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Function *F = vmInstr->getParent()->getParent();
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for (unsigned op=0; op < minstr->getNumOperands(); op++)
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{
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const MachineOperand& mop = minstr->getOperand(op);
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// skip the result position (for efficiency below) and any other
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// positions already marked as not a virtual register
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if (instrDesc.resultPos == (int) op ||
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mop.getOperandType() != MachineOperand::MO_VirtualRegister ||
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mop.getVRegValue() == NULL)
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{
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continue;
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}
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Value* opValue = mop.getVRegValue();
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bool constantThatMustBeLoaded = false;
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if (Constant *opConst = dyn_cast<Constant>(opValue))
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{
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unsigned int machineRegNum;
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int64_t immedValue;
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MachineOperand::MachineOperandType opType =
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ChooseRegOrImmed(opValue, minstr->getOpCode(), target,
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(target.getInstrInfo().getImmedConstantPos(minstr->getOpCode()) == (int) op),
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machineRegNum, immedValue);
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if (opType == MachineOperand::MO_MachineRegister)
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minstr->SetMachineOperandReg(op, machineRegNum);
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else if (opType == MachineOperand::MO_VirtualRegister)
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constantThatMustBeLoaded = true; // load is generated below
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else
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minstr->SetMachineOperandConst(op, opType, immedValue);
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}
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if (constantThatMustBeLoaded || isa<GlobalValue>(opValue))
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{ // opValue is a constant that must be explicitly loaded into a reg.
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TmpInstruction* tmpReg = InsertCodeToLoadConstant(F, opValue,vmInstr,
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loadConstVec,
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target);
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minstr->SetMachineOperandVal(op, MachineOperand::MO_VirtualRegister,
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tmpReg);
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}
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}
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//
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// Also, check for implicit operands used by the machine instruction
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// (no need to check those defined since they cannot be constants).
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// These include:
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// -- arguments to a Call
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// -- return value of a Return
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// Any such operand that is a constant value needs to be fixed also.
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// The current instructions with implicit refs (viz., Call and Return)
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// have no immediate fields, so the constant always needs to be loaded
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// into a register.
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//
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bool isCall = target.getInstrInfo().isCall(minstr->getOpCode());
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unsigned lastCallArgNum = 0; // unused if not a call
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CallArgsDescriptor* argDesc = NULL; // unused if not a call
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if (isCall)
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argDesc = CallArgsDescriptor::get(minstr);
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for (unsigned i=0, N=minstr->getNumImplicitRefs(); i < N; ++i)
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if (isa<Constant>(minstr->getImplicitRef(i)) ||
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isa<GlobalValue>(minstr->getImplicitRef(i)))
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{
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Value* oldVal = minstr->getImplicitRef(i);
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TmpInstruction* tmpReg =
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InsertCodeToLoadConstant(F, oldVal, vmInstr, loadConstVec, target);
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minstr->setImplicitRef(i, tmpReg);
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if (isCall)
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{ // find and replace the argument in the CallArgsDescriptor
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unsigned i=lastCallArgNum;
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while (argDesc->getArgInfo(i).getArgVal() != oldVal)
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++i;
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assert(i < argDesc->getNumArgs() &&
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"Constant operands to a call *must* be in the arg list");
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lastCallArgNum = i;
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argDesc->getArgInfo(i).replaceArgVal(tmpReg);
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}
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}
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return loadConstVec;
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}
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