llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-10-25 10:27:04 +00:00

Files

Hans Wennborg 53a63a9874 Merging r243469:

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r243469 | vkalintiris | 2015-07-28 12:57:25 -0700 (Tue, 28 Jul 2015) | 12 lines

[mips][FastISel] Fix generated code for IR's select instruction.

Summary:
Generate correct code for the select instruction by zero-extending
it's boolean/condition operand to GPR-width. This is necessary because
the conditional-move instructions operate on the whole register.

Reviewers: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11506
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_37@243646 91177308-0d34-0410-b5e6-96231b3b80d8

2015-07-30 16:14:05 +00:00

AArch64

[ShrinkWrap][PEI] Do not insert epilogue for unreachable blocks.

2015-07-10 22:09:55 +00:00

AMDGPU

Merging r243294:

2015-07-27 20:19:04 +00:00

ARM

Merge r242733, r242734, r242735 and r242742

2015-07-22 16:13:29 +00:00

BPF

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