llvm-6502

128bit_load_store.ll

[AArch64 NEON] Support poly128_t and implement relevant intrinsic.

2013-12-10 06:48:35 +00:00

adc.ll

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addsub_ext.ll

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addsub-shifted.ll

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addsub.ll

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alloca.ll

[AArch64] Make the use of FP instructions optional, but enabled by default.

2013-10-31 09:32:11 +00:00

analyze-branch.ll

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assertion-rc-mismatch.ll

Fix an over-constrained assertion in MachineFunction::addLiveIn.

2013-12-12 00:15:47 +00:00

atomic-ops-not-barriers.ll

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atomic-ops.ll

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basic-pic.ll

Convert a llc -filetype=obj test into a llvm-mc test.

2013-10-28 20:40:20 +00:00

bitfield-insert-0.ll

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bitfield-insert.ll

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bitfield.ll

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blockaddress.ll

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bool-loads.ll

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breg.ll

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callee-save.ll

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code-model-large-abs.ll

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compare-branch.ll

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complex-copy-noneon.ll

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cond-sel.ll

[AArch64] Make the use of FP instructions optional, but enabled by default.

2013-10-31 09:32:11 +00:00

directcond.ll

[AArch64] Make the use of FP instructions optional, but enabled by default.

2013-10-31 09:32:11 +00:00

dp1.ll

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dp2.ll

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dp-3source.ll

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extern-weak.ll

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extract.ll

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fastcc-reserved.ll

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fastcc.ll

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fcmp.ll

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fcvt-fixed.ll

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fcvt-int.ll

AArch64: enable MISched by default.

2013-10-09 07:53:57 +00:00

flags-multiuse.ll

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floatdp_1source.ll

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floatdp_2source.ll

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fp128-folding.ll

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fp128.ll

AArch64: enable MISched by default.

2013-10-09 07:53:57 +00:00

fp-cond-sel.ll

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fp-dp3.ll

[AArch64] Check fmul node single use in fused multiply patterns

2013-12-24 00:47:29 +00:00

fpimm.ll

AArch64: enable MISched by default.

2013-10-09 07:53:57 +00:00

frameaddr.ll

add test cases for frameaddr and returnaddr for aarch64

2013-10-29 17:01:29 +00:00

func-argpassing.ll

[AArch64] Make the use of FP instructions optional, but enabled by default.

2013-10-31 09:32:11 +00:00

func-calls.ll

[AArch64] Make the use of FP instructions optional, but enabled by default.

2013-10-31 09:32:11 +00:00

global-alignment.ll

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got-abuse.ll

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i128-align.ll

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illegal-float-ops.ll

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init-array.ll

Make sure -use-init-array has intended effect on all AArch64 ELF targets, not just linux.

2014-01-10 13:41:49 +00:00

inline-asm-constraints-badI.ll

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inline-asm-constraints-badK2.ll

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inline-asm-constraints-badK.ll

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inline-asm-constraints-badL.ll

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inline-asm-constraints.ll

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inline-asm-modifiers.ll

AArch64: use default asm operand printing when modifier inapplicable

2013-11-04 23:04:07 +00:00

jump-table.ll

Convert another llc -filetype=obj test.

2013-10-28 20:59:41 +00:00

large-consts.ll

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large-frame.ll

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ldst-regoffset.ll

[AArch64] Make the use of FP instructions optional, but enabled by default.

2013-10-31 09:32:11 +00:00

ldst-unscaledimm.ll

[AArch64] Make the use of FP instructions optional, but enabled by default.

2013-10-31 09:32:11 +00:00

ldst-unsignedimm.ll

[AArch64] Make the use of FP instructions optional, but enabled by default.

2013-10-31 09:32:11 +00:00

lit.local.cfg

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literal_pools.ll

[AArch64] Make the use of FP instructions optional, but enabled by default.

2013-10-31 09:32:11 +00:00

local_vars.ll

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logical_shifted_reg.ll

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logical-imm.ll

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movw-consts.ll

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movw-shift-encoding.ll

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mul-lohi.ll

AArch64: don't try to handle [SU]MUL_LOHI nodes

2014-01-14 22:53:22 +00:00

neon-2velem-high.ll

Add some missing pattern matches for AArch64 Neon intrinsics like vmull_high_n_s16 and friends.

2013-12-03 01:29:32 +00:00

neon-2velem.ll

[AArch64]Fix a problem that the register order of fmls/fmla by element is incorrect.

2013-12-25 07:12:34 +00:00

neon-3vdiff.ll

[AArch64 NEON] Support poly128_t and implement relevant intrinsic.

2013-12-10 06:48:35 +00:00

neon-aba-abd.ll

Fix pattern match for movi with 0D result

2013-12-09 19:29:14 +00:00

neon-across.ll

[AArch64] Refactor NEON floating-point Max/Min/Maxnm/Minnm across vector AArch64

2013-12-11 23:21:25 +00:00

neon-add-pairwise.ll

[AArch64]Add missing pair intrinsics such as:

2013-12-09 03:51:42 +00:00

neon-add-sub.ll

Fix Incorrect CHECK message [0-31]+ in test case.

2013-12-12 02:19:13 +00:00

neon-bitcast.ll

[AArch64] Removed unnecessary copy patterns with v1fx types.

2013-12-12 15:46:29 +00:00

neon-bitwise-instructions.ll

Teach the DAGCombiner how to fold 'vselect' dag nodes according

2014-01-08 18:33:04 +00:00

neon-bsl.ll

Revert "[AArch64] Added vselect patterns with float and double types"

2014-01-14 19:24:08 +00:00

neon-compare-instructions.ll

Implement aarch64 neon instruction class SIMD misc.

2013-11-14 02:44:13 +00:00

neon-copy.ll

[AArch64]Fix the problem can't select concat_vectors of two v1i32 types.

2014-01-17 05:44:46 +00:00

neon-copyPhysReg-tuple.ll

[AArch64]Add support to copy D tuples such as DPair/DTriple/DQuad and Q tuples such as QPair/QTriple/QQuad. There is no test case for D tuple as the original test cases are too large. As the copy of the D tuple is similar to the Q tuple, the correctness can be guaranteed.

2014-01-07 10:00:03 +00:00

neon-crypto.ll

Add predicate for AArch64 crypto instructions.

2013-11-19 01:38:31 +00:00

neon-diagnostics.ll

AArch64: The pattern match should check the range of the immediate value.

2013-11-29 02:11:22 +00:00

neon-extract.ll

Revert r199628: "[AArch64 NEON] Fix a bug caused by undef lane when generating VEXT."

2014-01-20 08:18:01 +00:00

neon-facge-facgt.ll

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neon-fma.ll

[AArch64] Check fmul node single use in fused multiply patterns

2013-12-24 00:47:29 +00:00

neon-frsqrt-frecp.ll

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neon-halving-add-sub.ll

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neon-load-store-v1i32.ll

[AArch64]Fix the problem can't select f16_to_f32 and f32_to_f16.

2014-01-17 06:23:30 +00:00

neon-max-min-pairwise.ll

[AArch64]Add missing pair intrinsics such as:

2013-12-09 03:51:42 +00:00

neon-max-min.ll

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neon-misc-scalar.ll

Add some missing pattern matches for AArch64 Neon intrinsics like vuqadd_s64 and friends.

2013-12-03 01:33:52 +00:00

neon-misc.ll

[AArch64 NEON] Custom lower conversion between vector integer and vector floating point if element bit-width doesn't match.

2014-01-17 05:52:35 +00:00

neon-mla-mls.ll

Fix Incorrect CHECK message [0-31]+ in test case.

2013-12-12 02:19:13 +00:00

neon-mov.ll

[AArch64 NEON]Implment loading vector constant form constant pool.

2013-12-18 06:26:04 +00:00

neon-mul-div.ll

[AArch64 NEON] Expand vector for UDIV/SDIV/UREM/SREM/FREM as neon doesn't support these operations.

2014-01-17 09:54:30 +00:00

neon-or-combine.ll

[AArch64] Fix assertion failure caused by an invalid comparison between APInt values.

2014-01-13 16:51:00 +00:00

neon-perm.ll

[AArch64 NEON] Add more scenarios to use perm instructions when lowering shuffle_vector

2014-01-13 01:56:29 +00:00

neon-rounding-halving-add.ll

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neon-rounding-shift.ll

Initial support for Neon scalar instructions.

2013-09-24 02:47:27 +00:00

neon-saturating-add-sub.ll

Initial support for Neon scalar instructions.

2013-09-24 02:47:27 +00:00

neon-saturating-rounding-shift.ll

Initial support for Neon scalar instructions.

2013-09-24 02:47:27 +00:00

neon-saturating-shift.ll

Initial support for Neon scalar instructions.

2013-09-24 02:47:27 +00:00

neon-scalar-abs.ll

[AArch64] Add support for NEON scalar absolute value instruction.

2013-10-16 21:04:34 +00:00

neon-scalar-add-sub.ll

Fix Incorrect CHECK message [0-31]+ in test case.

2013-12-12 02:19:13 +00:00

neon-scalar-by-elem-fma.ll

Fix Incorrect CHECK message [0-31]+ in test case.

2013-12-12 02:19:13 +00:00

neon-scalar-by-elem-mul.ll

Fix Incorrect CHECK message [0-31]+ in test case.

2013-12-12 02:19:13 +00:00

neon-scalar-compare.ll

[AArch64]The compare to zero intrinsics should be implemented by 'icmp/fcmp' and 'sext' not 'zext'. Modify the test cases.

2013-12-23 02:42:10 +00:00

neon-scalar-copy.ll

For AArch64 Neon, simplify scalar dup by lane0 for fp.

2013-12-30 02:44:35 +00:00

neon-scalar-cvt.ll

[AArch64] Refactor the NEON signed/unsigned floating-point convert to fixed-point

2013-12-10 21:33:56 +00:00

neon-scalar-extract-narrow.ll

[AArch64] Add support for NEON scalar extract narrow instructions.

2013-10-18 14:03:24 +00:00

neon-scalar-fabd.ll

[AArch64] Refactor the NEON floating-point absolute difference LLVM AArch64

2013-12-10 21:33:59 +00:00

neon-scalar-fcvt.ll

[AArch64] Refactor the Neon vector/scalar floating-point convert intrinsics so

2013-12-10 16:11:39 +00:00

neon-scalar-fp-compare.ll

[AArch64]The compare to zero intrinsics should be implemented by 'icmp/fcmp' and 'sext' not 'zext'. Modify the test cases.

2013-12-23 02:42:10 +00:00

neon-scalar-mul.ll

Implemented Neon scalar by element intrinsics.

2013-11-21 07:37:04 +00:00

neon-scalar-neg.ll

[AArch64] Add support for NEON scalar negate instruction.

2013-10-16 21:04:39 +00:00

neon-scalar-recip.ll

[AArch64] Refactor the NEON scalar floating-point reciprocal step and

2013-12-11 21:03:43 +00:00

neon-scalar-reduce-pairwise.ll

[AArch64] Refactor the NEON scalar reduce pairwise intrinsics, so that they use

2013-12-09 22:47:38 +00:00

neon-scalar-rounding-shift.ll

Fix Incorrect CHECK message [0-31]+ in test case.

2013-12-12 02:19:13 +00:00

neon-scalar-saturating-add-sub.ll

Fix Incorrect CHECK message [0-31]+ in test case.

2013-12-12 02:19:13 +00:00

neon-scalar-saturating-rounding-shift.ll

Fix Incorrect CHECK message [0-31]+ in test case.

2013-12-12 02:19:13 +00:00

neon-scalar-saturating-shift.ll

Fix Incorrect CHECK message [0-31]+ in test case.

2013-12-12 02:19:13 +00:00

neon-scalar-shift-imm.ll

AArch64: The pattern match should check the range of the immediate value.

2013-11-29 02:11:22 +00:00

neon-scalar-shift.ll

Add missing pattern matches to support ACLE intrinsics of AArch64 NEON.

2013-12-25 01:22:51 +00:00

neon-shift-left-long.ll

Fix a bug in DAGcombiner about zero-extend after setcc.

2013-12-30 02:05:13 +00:00

neon-shift.ll

Initial support for Neon scalar instructions.

2013-09-24 02:47:27 +00:00

neon-shl-ashr-lshr.ll

[AArch64]Can't select shift left 0 of type v1i64

2013-12-30 02:12:46 +00:00

neon-simd-ldst-multi-elem.ll

Fix the bugs about AArch64 Load/Store vector types and bitcast between i64 and vector types.

2013-11-22 08:47:22 +00:00

neon-simd-ldst-one.ll

Add missing pattern matches to support ACLE intrinsics of AArch64 NEON.

2013-12-25 01:22:51 +00:00

neon-simd-ldst.ll

For AArch64, add missing register cost calculation for big value types like v4i64 and v8i64.

2013-12-05 02:12:01 +00:00

neon-simd-post-ldst-multi-elem.ll

Implement the newly added ACLE functions for ld1/st1 with 2/3/4 vectors.

2013-11-18 06:31:53 +00:00

neon-simd-post-ldst-one.ll

Implement AArch64 neon instructions class SIMD lsone and SIMD lone-post.

2013-11-19 02:17:05 +00:00

neon-simd-shift.ll

[AArch64]Add missing floating point convert, round and misc intrinsics.

2013-12-03 06:06:55 +00:00

neon-simd-tbl.ll

Implement AArch64 NEON instruction set AdvSIMD (table).

2013-11-14 01:57:32 +00:00

neon-simd-vget.ll

For AArch64 back-end instruction selection, lower Neon_Lowxxx with EXTRCT_SUBREG.

2013-11-22 02:45:13 +00:00

neon-truncStore-extLoad.ll

[AArch64]Pattern match failures for truncate store and extend load

2013-12-09 03:34:08 +00:00

neon-vector-list-spill.ll

[AArch64]Add support to spill/fill D tuples such as DPair/DTriple/DQuad. There is no test cases for D tuple as the original test cases are too large. As the spill/fill of the D tuple is similar to the Q tuple, the correctness can be guaranteed.

2014-01-07 10:50:43 +00:00

pic-eh-stubs.ll

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regress-bitcast-formals.ll

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regress-f128csel-flags.ll

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regress-fp128-livein.ll

[AArch64] Fix NZCV reg live-in bug in F128CSEL codegen.

2013-10-24 08:28:24 +00:00

regress-tail-livereg.ll

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regress-tblgen-chains.ll

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regress-w29-reserved-with-fp.ll

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regress-wzr-allocatable.ll

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returnaddr.ll

add test cases for frameaddr and returnaddr for aarch64

2013-10-29 17:01:29 +00:00

setcc-takes-i32.ll

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sext_inreg.ll

For AArch64, lowering sext_inreg and generate optimized code by using SXTL.

2014-01-15 05:08:01 +00:00

sibling-call.ll

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sincos-expansion.ll

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tail-call.ll

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tls-dynamic-together.ll

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tls-dynamics.ll

AArch64: enable MISched by default.

2013-10-09 07:53:57 +00:00

tls-execs.ll

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tst-br.ll

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variadic.ll

Fix non-deterministic SDNodeOrder-dependent codegen

2014-01-12 14:09:17 +00:00

zero-reg.ll

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