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562cb16381
llvm-6502/lib/Target/SparcV8
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Brian Gaeke 562cb16381 Support loading arguments from %I0...%I5 into virtual registers in 
function prologues, and fix an off-by-one in visitCallInst that was
putting call args into the wrong registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12757 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-07 17:04:09 +00:00
..
DelaySlotFiller.cpp
InstSelectSimple.cpp Support loading arguments from %I0...%I5 into virtual registers in 2004-04-07 17:04:09 +00:00
Makefile
README.txt
SparcV8.h
SparcV8.td
SparcV8AsmPrinter.cpp Fix bug in printing loads. 2004-04-07 04:29:03 +00:00
SparcV8CodeEmitter.cpp
SparcV8InstrInfo_F2.td
SparcV8InstrInfo_F3.td
SparcV8InstrInfo.cpp
SparcV8InstrInfo.h
SparcV8InstrInfo.td andd subcc instructions which is used to create the 'cmp' pseudo instruction 2004-04-07 05:04:01 +00:00
SparcV8ISelSimple.cpp Support loading arguments from %I0...%I5 into virtual registers in 2004-04-07 17:04:09 +00:00
SparcV8JITInfo.h
SparcV8RegisterInfo.cpp Make generation of stack-slot loads and copies less ugly. 2004-04-07 04:29:14 +00:00
SparcV8RegisterInfo.h
SparcV8RegisterInfo.td
SparcV8TargetMachine.cpp
SparcV8TargetMachine.h

README.txt 

SparcV8 backend skeleton
------------------------

This directory will house a 32-bit SPARC V8 backend employing a expander-based
instruction selector.  Watch this space for more news coming soon!

$Date$