llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-15 23:31:37 +00:00

History

Owen Anderson 3042a65e5f Remove a very old instcombine where we would turn sequences of selects into

logical operations on the i1's driving them.  This is a bad idea for every
target I can think of (confirmed with micro tests on all of: x86-64, ARM,
AArch64, Mips, and PowerPC) because it forces the i1 to be materialized into
a general purpose register, whereas consuming it directly into a select generally
allows it to exist only transiently in a predicate or flags register.

Chandler ran a set of performance tests with this change, and reported no
measurable change on x86-64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201275 91177308-0d34-0410-b5e6-96231b3b80d8

2014-02-12 23:54:07 +00:00

Analysis

[Vectorizer] Add a new 'OperandValueKind' in TargetTransformInfo called

2014-02-12 23:43:47 +00:00

AsmParser

[ms-cxxabi] Add a new calling convention that swaps 'this' and 'sret'

2014-01-31 17:41:22 +00:00

Bitcode

Make parseBitcodeFile return an ErrorOr<Module *>.

2014-01-15 01:08:23 +00:00

CodeGen

Reformat a few lines with clang-format.