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llvm-6502/lib/Target/R600
History
Tom Stellard bad4e7b748 R600/SI: Add an s_mov_b32 to patterns which use the M0RegClass 
We need to use a s_mov_b32 rather than a copy, so that CSE will
eliminate redundant moves to the m0 register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222584 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 22:31:46 +00:00
..
AsmParser
R600/SI: Start implementing an assembler
2014-11-14 14:08:00 +00:00
InstPrinter
…
MCTargetDesc
R600: Fix assert on empty function
2014-11-13 20:07:40 +00:00
TargetInfo
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AMDGPU.h
R600/SI: Add SIFoldOperands pass
2014-11-21 22:06:37 +00:00
AMDGPU.td
R600/SI: Start implementing an assembler
2014-11-14 14:08:00 +00:00
AMDGPUAlwaysInlinePass.cpp
Reapply: R600: Make sure to inline all internal functions
2014-11-03 19:49:05 +00:00
AMDGPUAsmPrinter.cpp
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AMDGPUAsmPrinter.h
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AMDGPUCallingConv.td
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AMDGPUFrameLowering.cpp
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AMDGPUFrameLowering.h
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AMDGPUInstrInfo.cpp
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AMDGPUInstrInfo.h
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AMDGPUInstrInfo.td
R600/SI: Combine min3/max3 instructions
2014-11-14 20:08:52 +00:00
AMDGPUInstructions.td
R600/SI: Start implementing an assembler
2014-11-14 14:08:00 +00:00
AMDGPUIntrinsicInfo.cpp
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AMDGPUIntrinsicInfo.h
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AMDGPUIntrinsics.td
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AMDGPUISelDAGToDAG.cpp
R600/SI: Get rid of FCLAMP_SI pseudo
2014-11-13 19:49:04 +00:00
AMDGPUISelLowering.cpp
R600: Permute operands when selecting legacy min/max
2014-11-15 05:02:57 +00:00
AMDGPUISelLowering.h
R600: Factor i64 UDIVREM lowering into its own fuction
2014-11-15 01:07:53 +00:00
AMDGPUMachineFunction.cpp
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AMDGPUMachineFunction.h
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AMDGPUMCInstLower.cpp
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AMDGPUMCInstLower.h
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AMDGPUPromoteAlloca.cpp
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AMDGPURegisterInfo.cpp
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AMDGPURegisterInfo.h
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AMDGPURegisterInfo.td
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AMDGPUSubtarget.cpp
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AMDGPUSubtarget.h
R600: Remove unused define
2014-11-07 20:45:00 +00:00
AMDGPUTargetMachine.cpp
R600/SI: Add SIFoldOperands pass
2014-11-21 22:06:37 +00:00
AMDGPUTargetMachine.h
This patch changes the ownership of TLOF from TargetLoweringBase to TargetMachine so that different subtargets could share the TLOF effectively
2014-11-13 09:26:31 +00:00
AMDGPUTargetTransformInfo.cpp
Fix broken doxygen annotations, NFC
2014-11-12 18:25:06 +00:00
AMDILCFGStructurizer.cpp
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CaymanInstructions.td
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CMakeLists.txt
R600/SI: Add SIFoldOperands pass
2014-11-21 22:06:37 +00:00
EvergreenInstructions.td
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LLVMBuild.txt
R600/SI: Start implementing an assembler
2014-11-14 14:08:00 +00:00
Makefile
R600/SI: Start implementing an assembler
2014-11-14 14:08:00 +00:00
Processors.td
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R600ClauseMergePass.cpp
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R600ControlFlowFinalizer.cpp
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R600Defines.h
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R600EmitClauseMarkers.cpp
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R600ExpandSpecialInstrs.cpp
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R600InstrFormats.td
R600/SI: Start implementing an assembler
2014-11-14 14:08:00 +00:00
R600InstrInfo.cpp
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R600InstrInfo.h
…
R600Instructions.td
R600/SI: Start implementing an assembler
2014-11-14 14:08:00 +00:00
R600Intrinsics.td
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R600ISelLowering.cpp
R600: Factor i64 UDIVREM lowering into its own fuction
2014-11-15 01:07:53 +00:00
R600ISelLowering.h
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R600MachineFunctionInfo.cpp
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R600MachineFunctionInfo.h
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R600MachineScheduler.cpp
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R600MachineScheduler.h
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R600OptimizeVectorRegisters.cpp
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R600Packetizer.cpp
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R600RegisterInfo.cpp
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R600RegisterInfo.h
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R600RegisterInfo.td
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R600Schedule.td
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R600TextureIntrinsicsReplacer.cpp
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R700Instructions.td
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SIAnnotateControlFlow.cpp
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SIDefines.h
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SIFixSGPRCopies.cpp
R600/SI: Assume SIFixSGPRCopies makes changes
2014-11-17 21:11:34 +00:00
SIFixSGPRLiveRanges.cpp
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SIFoldOperands.cpp
R600/SI: Add SIFoldOperands pass
2014-11-21 22:06:37 +00:00
SIInsertWaits.cpp
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SIInstrFormats.td
R600/SI: Emit s_mov_b32 m0, -1 before every DS instruction
2014-11-21 22:31:44 +00:00
SIInstrInfo.cpp
R600/SI: Add an s_mov_b32 to patterns which use the M0RegClass
2014-11-21 22:31:46 +00:00
SIInstrInfo.h
R600/SI: Implement areMemAccessesTriviallyDisjoint
2014-11-19 00:01:31 +00:00
SIInstrInfo.td
R600/SI: Emit s_mov_b32 m0, -1 before every DS instruction
2014-11-21 22:31:44 +00:00
SIInstructions.td
R600/SI: Add an s_mov_b32 to patterns which use the M0RegClass
2014-11-21 22:31:46 +00:00
SIIntrinsics.td
…
SIISelLowering.cpp
R600/SI: Emit s_mov_b32 m0, -1 before every DS instruction
2014-11-21 22:31:44 +00:00
SIISelLowering.h
R600/SI: Combine min3/max3 instructions
2014-11-14 20:08:52 +00:00
SILoadStoreOptimizer.cpp
R600/SI: Emit s_mov_b32 m0, -1 before every DS instruction
2014-11-21 22:31:44 +00:00
SILowerControlFlow.cpp
R600/SI: Emit s_mov_b32 m0, -1 before every DS instruction
2014-11-21 22:31:44 +00:00
SILowerI1Copies.cpp
R600/SI: Fix verifier error from a branch on IMPLICIT_DEF
2014-11-14 18:43:41 +00:00
SIMachineFunctionInfo.cpp
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SIMachineFunctionInfo.h
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SIRegisterInfo.cpp
R600/SI: Fix spilling of m0 register
2014-11-14 20:43:26 +00:00
SIRegisterInfo.h
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SIRegisterInfo.td
R600/SI: Fix assembly names for exec_hi and exec_lo
2014-11-14 14:08:04 +00:00
SISchedule.td
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SIShrinkInstructions.cpp
R600/SI: Use s_movk_i32
2014-11-13 20:44:23 +00:00
SITypeRewriter.cpp
Revert "IR: MDNode => Value"
2014-11-11 21:30:22 +00:00