llvm-6502/test/CodeGen
Tim Northover 5a02fc4b5f ARM: implement @llvm.readcyclecounter intrinsic
This implements the @llvm.readcyclecounter intrinsic as the specific
MRC instruction specified in the ARM manuals for CPUs with the Power
Management extensions.

Older CPUs had slightly different methods which may also have to be
implemented eventually, but this should cover all v7 cases.

rdar://problem/13939186

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182603 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-23 19:11:20 +00:00
..
AArch64
ARM ARM: implement @llvm.readcyclecounter intrinsic 2013-05-23 19:11:20 +00:00
CPP
Generic Drop @llvm.annotation and @llvm.ptr.annotation intrinsics during codegen. 2013-05-21 14:37:16 +00:00
Hexagon
Inputs
MBlaze
Mips [mips] Rename option to make it compatible with gcc. 2013-05-21 17:17:59 +00:00
MSP430
NVPTX [NVPTX] Add @llvm.nvvm.sqrt.f() intrinsic 2013-05-21 16:51:30 +00:00
PowerPC
R600 R600: Fix R600ControlFlowFinalizer not considering VTX_READ 128 bit dst reg 2013-05-23 18:26:42 +00:00
SI
SPARC Also expand 64-bit bitcasts. 2013-05-20 01:01:43 +00:00
SystemZ [SystemZ] Tighten branch tests 2013-05-21 08:53:17 +00:00
Thumb
Thumb2
X86 Add missing test from r175092. 2013-05-23 07:46:13 +00:00
XCore