Vincent Lejeune 58df169e82 R600: Export is emitted as a CF_NATIVE inst ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179685 91177308-0d34-0410-b5e6-96231b3b80d8

2013-04-17 15:17:32 +00:00

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InstPrinter

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MCTargetDesc

R600: Export is emitted as a CF_NATIVE inst

2013-04-17 15:17:32 +00:00

TargetInfo

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AMDGPU.h

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AMDGPU.td

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AMDGPUAsmPrinter.cpp

R600: Emit used GPRs count

2013-04-17 15:17:25 +00:00

AMDGPUAsmPrinter.h

R600: Emit used GPRs count

2013-04-17 15:17:25 +00:00

AMDGPUCallingConv.td

R600/SI: Add support for buffer stores v2

2013-04-05 23:31:51 +00:00

AMDGPUConvertToISA.cpp

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AMDGPUFrameLowering.cpp

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AMDGPUFrameLowering.h

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AMDGPUIndirectAddressing.cpp

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AMDGPUInstrInfo.cpp

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AMDGPUInstrInfo.h

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AMDGPUInstrInfo.td

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AMDGPUInstructions.td

R600/SI: Add pattern for AMDGPUurecip

2013-04-10 17:17:56 +00:00

AMDGPUIntrinsics.td

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AMDGPUISelLowering.cpp

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AMDGPUISelLowering.h

R600/SI: Add support for buffer stores v2

2013-04-05 23:31:51 +00:00

AMDGPUMachineFunction.cpp

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AMDGPUMachineFunction.h

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AMDGPUMCInstLower.cpp

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AMDGPUMCInstLower.h

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AMDGPURegisterInfo.cpp

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AMDGPURegisterInfo.h

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AMDGPURegisterInfo.td

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AMDGPUStructurizeCFG.cpp

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AMDGPUSubtarget.cpp

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AMDGPUSubtarget.h

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AMDGPUTargetMachine.cpp

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AMDGPUTargetMachine.h

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AMDIL7XXDevice.cpp

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AMDIL7XXDevice.h

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AMDIL.h

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AMDILBase.td

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AMDILCFGStructurizer.cpp

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AMDILDevice.cpp

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AMDILDevice.h

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AMDILDeviceInfo.cpp

R600/SI: Add processor types for each SI variant

2013-04-05 23:31:35 +00:00

AMDILDeviceInfo.h

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AMDILDevices.h

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AMDILEvergreenDevice.cpp

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AMDILEvergreenDevice.h

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AMDILInstrInfo.td

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AMDILIntrinsicInfo.cpp

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AMDILIntrinsicInfo.h

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AMDILIntrinsics.td

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AMDILISelDAGToDAG.cpp

R600/SI: Add support for buffer stores v2

2013-04-05 23:31:51 +00:00

AMDILISelLowering.cpp

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AMDILNIDevice.cpp

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AMDILNIDevice.h

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AMDILPeepholeOptimizer.cpp

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AMDILRegisterInfo.td

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AMDILSIDevice.cpp

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AMDILSIDevice.h

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CMakeLists.txt

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LLVMBuild.txt

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Makefile

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Processors.td

R600: Add RV670 processor

2013-04-05 23:31:40 +00:00

R600ControlFlowFinalizer.cpp

R600ControlFlowFinalizer.cpp: Fix a warning. [-Wunused-variable]

2013-04-11 04:16:27 +00:00

R600Defines.h

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R600EmitClauseMarkers.cpp

R600: Fix last ALU of a clause being emitted in a separate clause

2013-04-03 18:24:47 +00:00

R600ExpandSpecialInstrs.cpp

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R600InstrInfo.cpp

R600: Factorize maximum alu per clause in a single location

2013-04-03 16:49:34 +00:00

R600InstrInfo.h

R600: Factorize maximum alu per clause in a single location

2013-04-03 16:49:34 +00:00

R600Instructions.td

R600: Export is emitted as a CF_NATIVE inst

2013-04-17 15:17:32 +00:00

R600Intrinsics.td

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R600ISelLowering.cpp

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R600ISelLowering.h

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R600MachineFunctionInfo.cpp

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R600MachineFunctionInfo.h

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R600MachineScheduler.cpp

R600: Factorize maximum alu per clause in a single location

2013-04-03 16:49:34 +00:00

R600MachineScheduler.h

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R600RegisterInfo.cpp

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R600RegisterInfo.h

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R600RegisterInfo.td

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R600Schedule.td

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SIAnnotateControlFlow.cpp

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SIDefines.h

R600/SI: Emit config values in register value pairs.

2013-04-15 17:51:35 +00:00

SIInsertWaits.cpp

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SIInstrFormats.td

R600/SI: Use same names for corresponding MUBUF operands and encoding fields

2013-04-05 23:31:44 +00:00

SIInstrInfo.cpp

R600/SI: dynamical figure out the reg class of MIMG

2013-04-10 08:39:16 +00:00

SIInstrInfo.h

R600/SI: adjust writemask to only the used components

2013-04-10 08:39:08 +00:00

SIInstrInfo.td

R600/SI: dynamical figure out the reg class of MIMG

2013-04-10 08:39:16 +00:00

SIInstructions.td

R600/SI: Add pattern for AMDGPUurecip

2013-04-10 17:17:56 +00:00

SIIntrinsics.td

R600/SI: remove image sample writemask

2013-04-10 08:39:01 +00:00

SIISelLowering.cpp

R600/SI: dynamical figure out the reg class of MIMG

2013-04-10 08:39:16 +00:00

SIISelLowering.h

R600/SI: dynamical figure out the reg class of MIMG

2013-04-10 08:39:16 +00:00

SILowerControlFlow.cpp

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SIMachineFunctionInfo.cpp

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SIMachineFunctionInfo.h

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SIRegisterInfo.cpp

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SIRegisterInfo.h

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SIRegisterInfo.td

R600/SI: dynamical figure out the reg class of MIMG

2013-04-10 08:39:16 +00:00

SISchedule.td

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