Evan Cheng 599a6a88ce Fix PR3701. 1. X86 target renamed eflags register to flags. This matches what llvm-gcc generates so codegen knows flags register is being clobbered by inline asm. 2. BURR scheduler should also check if inline asm nodes can clobber "live" physical registers. Previously it was only checking target nodes with implicit defs. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65996 91177308-0d34-0410-b5e6-96231b3b80d8

2009-03-04 01:41:49 +00:00

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Alpha

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ARM

Last commit accidentially deleted this code.

2009-02-28 06:02:14 +00:00

CBackend

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CellSPU

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CPP

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Generic

bug 3610: Test case.

2009-02-22 15:54:44 +00:00

IA64

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Mips

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PowerPC

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X86

Fix PR3701. 1. X86 target renamed eflags register to flags. This matches what llvm-gcc generates so codegen knows flags register is being clobbered by inline asm. 2. BURR scheduler should also check if inline asm nodes can clobber "live" physical registers. Previously it was only checking target nodes with implicit defs.

2009-03-04 01:41:49 +00:00

XCore

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