llvm-6502

AsmParser

R600/SI: Use a better error message for unsupported instructions in the assembler

2015-04-23 19:33:51 +00:00

InstPrinter

R600/SI: Initial support for assembler and inline assembly

2015-04-08 01:09:26 +00:00

MCTargetDesc

[mc] Clean up emission of byte sequences

2015-04-17 11:12:43 +00:00

TargetInfo

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AMDGPU.h

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AMDGPU.td

R600/SI: Add assembler support for all CI and VI VOP1 instructions

2015-04-23 19:33:54 +00:00

AMDGPUAlwaysInlinePass.cpp

R600: Fix always inline pass breaking noinline functions

2015-04-22 17:10:44 +00:00

AMDGPUAsmPrinter.cpp

R600/SI: Initial support for assembler and inline assembly

2015-04-08 01:09:26 +00:00

AMDGPUAsmPrinter.h

R600/SI: Add some missing overrides

2015-04-08 02:07:05 +00:00

AMDGPUCallingConv.td

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AMDGPUFrameLowering.cpp

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AMDGPUFrameLowering.h

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AMDGPUInstrInfo.cpp

Remove the need to cache the subtarget in the R600 TargetRegisterInfo

2015-03-11 18:43:21 +00:00

AMDGPUInstrInfo.h

ArrayRefize memory operand folding. NFC.

2015-02-28 12:04:00 +00:00

AMDGPUInstrInfo.td

Revert revisions r234755, r234759, r234760

2015-04-13 17:47:15 +00:00

AMDGPUInstructions.td

Reduce dyn_cast<> to isa<> or cast<> where possible.

2015-04-10 11:24:51 +00:00

AMDGPUIntrinsicInfo.cpp

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AMDGPUIntrinsicInfo.h

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AMDGPUIntrinsics.td

R600/SI: Add an intrinsic for S_FLBIT_I32 / V_FFBH_I32

2015-03-04 17:33:45 +00:00

AMDGPUISelDAGToDAG.cpp

Reduce dyn_cast<> to isa<> or cast<> where possible.

2015-04-10 11:24:51 +00:00

AMDGPUISelLowering.cpp

Revert revisions r234755, r234759, r234760

2015-04-13 17:47:15 +00:00

AMDGPUISelLowering.h

Revert revisions r234755, r234759, r234760

2015-04-13 17:47:15 +00:00

AMDGPUMachineFunction.cpp

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AMDGPUMachineFunction.h

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AMDGPUMCInstLower.cpp

[MCInstPrinter] Enable MCInstPrinter to change its behavior based on the

2015-03-27 20:36:02 +00:00

AMDGPUMCInstLower.h

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AMDGPUPromoteAlloca.cpp

Remove superfluous .str() and replace std::string concatenation with Twine.

2015-03-27 17:51:30 +00:00

AMDGPURegisterInfo.cpp

Remove the need to cache the subtarget in the R600 TargetRegisterInfo

2015-03-11 18:43:21 +00:00

AMDGPURegisterInfo.h

Remove the need to cache the subtarget in the R600 TargetRegisterInfo

2015-03-11 18:43:21 +00:00

AMDGPURegisterInfo.td

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AMDGPUSubtarget.cpp

R600/SI: Add assembler support for all CI and VI VOP1 instructions

2015-04-23 19:33:54 +00:00

AMDGPUSubtarget.h

R600/SI: Add assembler support for all CI and VI VOP1 instructions

2015-04-23 19:33:54 +00:00

AMDGPUTargetMachine.cpp

Grab a subtarget off of an AMDGPUTargetMachine rather than a

2015-03-21 03:17:25 +00:00

AMDGPUTargetMachine.h

Remove the target independent TargetMachine::getSubtarget and

2015-03-21 04:22:23 +00:00

AMDGPUTargetTransformInfo.cpp

DataLayout is mandatory, update the API to reflect it with references.

2015-03-10 02:37:25 +00:00

AMDGPUTargetTransformInfo.h

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AMDILCFGStructurizer.cpp

CodeGen: Use the new DebugLoc API, NFC

2015-03-30 19:14:47 +00:00

AMDKernelCodeT.h

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CaymanInstructions.td

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CIInstructions.td

R600/SI: Add assembler support for all CI and VI VOP1 instructions

2015-04-23 19:33:54 +00:00

CMakeLists.txt

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EvergreenInstructions.td

Revert revisions r234755, r234759, r234760

2015-04-13 17:47:15 +00:00

LLVMBuild.txt

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Makefile

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Processors.td

R600/SI: Limit SGPRs to 80 on Tonga and Iceland

2015-03-09 15:48:09 +00:00

R600ClauseMergePass.cpp

Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used.

2015-03-23 19:32:43 +00:00

R600ControlFlowFinalizer.cpp

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R600Defines.h

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R600EmitClauseMarkers.cpp

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R600ExpandSpecialInstrs.cpp

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R600InstrFormats.td

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R600InstrInfo.cpp

Remove the need to cache the subtarget in the R600 TargetRegisterInfo

2015-03-11 18:43:21 +00:00

R600InstrInfo.h

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R600Instructions.td

R600: Make FMIN/MAXNUM legal on all asics

2015-04-12 23:45:05 +00:00

R600Intrinsics.td

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R600ISelLowering.cpp

Revert revisions r234755, r234759, r234760

2015-04-13 17:47:15 +00:00

R600ISelLowering.h

Revert revisions r234755, r234759, r234760

2015-04-13 17:47:15 +00:00

R600MachineFunctionInfo.cpp

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R600MachineFunctionInfo.h

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R600MachineScheduler.cpp

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R600MachineScheduler.h

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R600OptimizeVectorRegisters.cpp

Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used.

2015-03-23 19:32:43 +00:00

R600Packetizer.cpp

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R600RegisterInfo.cpp

Remove the need to cache the subtarget in the R600 TargetRegisterInfo

2015-03-11 18:43:21 +00:00

R600RegisterInfo.h

Remove the need to cache the subtarget in the R600 TargetRegisterInfo

2015-03-11 18:43:21 +00:00

R600RegisterInfo.td

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R600Schedule.td

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R600TextureIntrinsicsReplacer.cpp

Reduce dyn_cast<> to isa<> or cast<> where possible.

2015-04-10 11:24:51 +00:00

R700Instructions.td

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SIAnnotateControlFlow.cpp

R600/SI: Fix verifier error caused by SIAnnotateControlFlow

2015-04-14 14:36:45 +00:00

SIDefines.h

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SIFixSGPRCopies.cpp

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SIFixSGPRLiveRanges.cpp

Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used.

2015-03-23 19:32:43 +00:00

SIFoldOperands.cpp

Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used.

2015-03-23 19:32:43 +00:00

SIInsertWaits.cpp

Remove the need to cache the subtarget in the R600 TargetRegisterInfo

2015-03-11 18:43:21 +00:00

SIInstrFormats.td

R600/SI: Initial support for assembler and inline assembly

2015-04-08 01:09:26 +00:00

SIInstrInfo.cpp

R600/SI: Improve BFM support

2015-03-24 13:40:21 +00:00

SIInstrInfo.h

R600/SI: Merge tables for commuting

2015-03-23 18:45:41 +00:00

SIInstrInfo.td

R600/SI: Add assembler support for all CI and VI VOP1 instructions

2015-04-23 19:33:54 +00:00

SIInstructions.td

R600/SI: v_mov_fed_b32 does not exist on VI

2015-04-23 19:33:52 +00:00

SIIntrinsics.td

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SIISelLowering.cpp

R600: Make FMIN/MAXNUM legal on all asics

2015-04-12 23:45:05 +00:00

SIISelLowering.h

R600/SI: Add some missing overrides

2015-04-08 02:07:05 +00:00

SILoadStoreOptimizer.cpp

Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used.

2015-03-23 19:32:43 +00:00

SILowerControlFlow.cpp

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SILowerI1Copies.cpp

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SIMachineFunctionInfo.cpp

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SIMachineFunctionInfo.h

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SIPrepareScratchRegs.cpp

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SIRegisterInfo.cpp

R600/SI: Insert more NOPs after READLANE on VI, don't use NOPs on CI

2015-03-24 13:40:38 +00:00

SIRegisterInfo.h

Remove the need to cache the subtarget in the R600 TargetRegisterInfo

2015-03-11 18:43:21 +00:00

SIRegisterInfo.td

R600/SI: Initial support for assembler and inline assembly

2015-04-08 01:09:26 +00:00

SISchedule.td

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SIShrinkInstructions.cpp

Purge unused includes throughout libSupport.

2015-03-23 18:07:13 +00:00

SITypeRewriter.cpp

Remove more superfluous .str() and replace std::string concatenation with Twine.

2015-03-30 15:42:36 +00:00

VIInstrFormats.td

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VIInstructions.td

R600/SI: Add assembler support for all CI and VI VOP1 instructions

2015-04-23 19:33:54 +00:00