Bruno Cardoso Lopes 5a3a476750 - Add AVX form of all SSE2 logical instructions ...

- Add VEX encoding bits to x86 MRM0r-MRM7r


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107238 91177308-0d34-0410-b5e6-96231b3b80d8

2010-06-30 01:58:37 +00:00

..

dg.exp

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x86_32-bit_cat.s

Fix assembly parsing and encoding of the pushf and popf family of

2010-05-20 16:16:00 +00:00

x86_32-bit.s

xfail these tests temporarily to get teh buildbots back to happy land.

2010-03-14 07:32:48 +00:00

x86_32-encoding.s

- Add AVX form of all SSE2 logical instructions

2010-06-30 01:58:37 +00:00

x86_32-mismatched-add.s

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x86_32-new-encoder.s

Add support for the x86 instructions "pusha" and "popa".

2010-06-23 20:00:58 +00:00

x86_64-encoding.s

- Add AVX form of all SSE2 logical instructions

2010-06-30 01:58:37 +00:00

x86_64-imm-widths.s

MC/X86: Subdivide immediates a bit more, so that we properly recognize immediates based on the width of the target instruction. For example:

2010-05-22 21:02:33 +00:00

x86_64-incl_decl.s

MC/X86/AsmMatcher: Use the new instruction cleanup routine to implement a

2010-03-18 20:06:02 +00:00

x86_64-new-encoder.s

fix rdar://7873482 by teaching the instruction encoder to emit

2010-06-19 00:34:00 +00:00

x86_64-operands.s

Teach the x86 mc assembler that %dr6 = %db6, this implements

2010-06-24 07:29:18 +00:00

x86_64-suffix-matching.s

MC/X86: Extend suffix matching hack to match 'q' suffix.

2010-05-12 00:54:20 +00:00

x86_instructions.s

fix rdar://7986634 - match instruction opcodes case insensitively.

2010-05-19 23:34:33 +00:00

x86_operands.s

Revert r103137, fix for $ in labels. It looks like we can't actually handle this

2010-05-06 14:46:38 +00:00

x86_word_directive.s

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