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Renato Golin 5ad5f5931e Improve long vector sext/zext lowering on ARM
The ARM backend currently has poor codegen for long sext/zext
operations, such as v8i8 -> v8i32. This patch addresses this
by performing a custom expansion in ARMISelLowering. It also
adds/changes the cost of such lowering in ARMTTI.

This partially addresses PR14867.

Patch by Pete Couperus

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177380 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-19 08:15:38 +00:00
autoconf
bindings
cmake
docs Make the fields in the diagram match the descriptive text above them. 2013-03-18 20:21:47 +00:00
examples
include Move #include of BitVector from .h to .cpp file. 2013-03-18 23:45:45 +00:00
lib Improve long vector sext/zext lowering on ARM 2013-03-19 08:15:38 +00:00
projects
runtime
test Improve long vector sext/zext lowering on ARM 2013-03-19 08:15:38 +00:00
tools
unittests
utils TableGen fix for the new machine model. 2013-03-18 20:42:25 +00:00
.arcconfig
.gitignore
CMakeLists.txt
CODE_OWNERS.TXT Update 2013-03-18 17:47:33 +00:00
configure
CREDITS.TXT Update 2013-03-18 17:47:33 +00:00
LICENSE.TXT
llvm.spec.in
LLVMBuild.txt
Makefile
Makefile.common
Makefile.config.in
Makefile.rules
README.txt

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