Evan Cheng 5c6aba2e3a Model VLD*_UPD and VLD*odd_UPD pair with REG_SEQUENCE. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103790 91177308-0d34-0410-b5e6-96231b3b80d8

2010-05-14 18:54:59 +00:00

..

Analysis

Clear CachedFunctionInfo upon Pass::releaseMemory. Because ValueMap will abort

2010-05-12 21:48:15 +00:00

Archive

silence a warning, patch by "mike".

2010-04-25 04:44:26 +00:00

AsmParser

Remove the API compatibility layer which converted add, sub, and mul

2010-05-03 22:44:19 +00:00

Bitcode

Revert 101465, it broke internal OpenGL testing.

2010-04-16 23:37:20 +00:00

CodeGen

Simplify the handling of physreg defs and uses in RegAllocFast.

2010-05-14 18:03:25 +00:00

CompilerDriver

Use FindExecutable as a fall-back search method.

2010-03-05 04:46:28 +00:00

ExecutionEngine

Remove the -enable-sjlj-eh option, which doesn't do anything.

2010-05-02 15:36:26 +00:00

Linker

Introduce isOpaqueTy and use it rather than isa<OpaqueType>. Also, move some

2010-02-16 14:50:09 +00:00

MC

MC/Mach-O/x86_64: Darwin's special "signed_N" relocation types should only be

2010-05-14 18:53:40 +00:00

Support

Add new configure option, --disable-timestamps, intended to turn off anything which would mess up binary/object comparisons. Currently:

2010-05-10 20:11:56 +00:00

System

Add llvm::sys::RunInterruptHandlers(), which runs the registered SIGINT cleanup

2010-05-08 02:10:34 +00:00

Target

Model VLD*_UPD and VLD*odd_UPD pair with REG_SEQUENCE.

2010-05-14 18:54:59 +00:00

Transforms

Remove heinous tabs.

2010-05-13 06:45:13 +00:00

VMCore

Adding a v8i64 512-bit vector type. This will be used to model ARM NEON intrinsics which translate into a pair of vld / vst instructions that can load / store 8 consecutive 64-bit (D) registers.

2010-05-13 23:55:47 +00:00

Makefile

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