Gerolf Hoflehner 392f7d970c [MachineCombiner] Fix for ICE bug 20598 ...

The combiner ignored DBG nodes when checking
the uses of a virtual register.

It combined a sequence like
   %vreg1 = madd %vreg2, %vreg3,...
   DBG_VALUE (%vreg1 ...)
   %vreg4 = add %vreg1,...
to
  %vreg4 = madd %vreg2, %vreg3

leaving behind a dangling DBG_VALUE with
a definition. This triggered an assertion
in the MachineTraceMetrics.cpp module.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215431 91177308-0d34-0410-b5e6-96231b3b80d8

2014-08-12 07:54:12 +00:00

..

AsmParser

Run sort_includes.py on the AArch64 backend.

2014-07-25 11:42:14 +00:00

Disassembler

Run sort_includes.py on the AArch64 backend.

2014-07-25 11:42:14 +00:00

InstPrinter

Run sort_includes.py on the AArch64 backend.

2014-07-25 11:42:14 +00:00

MCTargetDesc

If available, pass down the Fixup object to EvaluateAsRelocatable.

2014-08-10 11:35:12 +00:00

TargetInfo

AArch64: stop trying to take control of all UnknownArch triples.

2014-08-08 08:27:44 +00:00

Utils

Restore getInvertedCondCode() from the phased-out backend, fixing disassembly for NV

2014-05-29 11:34:50 +00:00

AArch64.h

[AArch64] Add an FP load balancing pass for Cortex-A57

2014-08-08 12:33:21 +00:00

AArch64.td

[AArch64] Basic Sched Model for Cortex-A57.

2014-06-11 21:06:56 +00:00

AArch64A57FPLoadBalancing.cpp

AArch64: avoid deleting the current iterator in a loop.

2014-08-08 17:31:52 +00:00

AArch64AddressTypePromotion.cpp

AArch64: Re-enable AArch64AddressTypePromotion

2014-07-02 18:17:40 +00:00

AArch64AdvSIMDScalarPass.cpp

Remove the TargetMachine forwards for TargetSubtargetInfo based

2014-08-04 21:25:23 +00:00

AArch64AsmPrinter.cpp

Remove the TargetMachine forwards for TargetSubtargetInfo based

2014-08-04 21:25:23 +00:00

AArch64BranchRelaxation.cpp

Remove the TargetMachine forwards for TargetSubtargetInfo based

2014-08-04 21:25:23 +00:00

AArch64CallingConvention.td

Remove the target machine from CCState. Previously it was only used

2014-08-06 18:45:26 +00:00

AArch64CleanupLocalDynamicTLSPass.cpp

Remove the TargetMachine forwards for TargetSubtargetInfo based

2014-08-04 21:25:23 +00:00

AArch64CollectLOH.cpp

Remove the TargetMachine forwards for TargetSubtargetInfo based

2014-08-04 21:25:23 +00:00

AArch64ConditionalCompares.cpp

Have MachineFunction cache a pointer to the subtarget to make lookups

2014-08-05 02:39:49 +00:00

AArch64DeadRegisterDefinitionsPass.cpp

Have MachineFunction cache a pointer to the subtarget to make lookups

2014-08-05 02:39:49 +00:00

AArch64ExpandPseudoInsts.cpp

Have MachineFunction cache a pointer to the subtarget to make lookups

2014-08-05 02:39:49 +00:00

AArch64FastISel.cpp

[FastISel][AArch64] Attach MachineMemOperands to load and store instructions.

2014-08-08 17:24:10 +00:00

AArch64FrameLowering.cpp

Fix typos:

2014-08-11 18:04:46 +00:00

AArch64FrameLowering.h

Remove the uses of AArch64TargetMachine and AArch64Subtarget from

2014-06-10 17:33:39 +00:00

AArch64InstrAtomics.td

AArch64/ARM64: move ARM64 into AArch64's place

2014-05-24 12:50:23 +00:00

AArch64InstrFormats.td

[AArch64] Fix registerAllocator assigns same register for base and wback in

2014-08-11 21:39:53 +00:00

AArch64InstrInfo.cpp

[MachineCombiner] Fix for ICE bug 20598

2014-08-12 07:54:12 +00:00

AArch64InstrInfo.h

MachineCombiner Pass for selecting faster instruction sequence on AArch64

2014-08-07 21:40:58 +00:00

AArch64InstrInfo.td

[AArch64] Disable some optimization cases for type conversion from sint to fp, because those optimization cases are micro-architecture dependent and only make sense for Cyclone. A new predicate Cyclone is introduced in .td file.

2014-07-24 01:29:59 +00:00

AArch64ISelDAGToDAG.cpp

[AArch64] Unsized types don't specify an alignment.

2014-06-30 15:03:00 +00:00

AArch64ISelLowering.cpp

AArch64: Tidy up a few comments.

2014-08-11 22:42:28 +00:00

AArch64ISelLowering.h

Add alignment value to allowsUnalignedMemoryAccess

2014-07-27 17:46:40 +00:00

AArch64LoadStoreOptimizer.cpp

Add missing closing namespace comment.

2014-08-11 22:42:31 +00:00

AArch64MachineCombinerPattern.h

MachineCombiner Pass for selecting faster instruction sequence on AArch64

2014-08-07 21:40:58 +00:00

AArch64MachineFunctionInfo.h

AArch64/ARM64: move ARM64 into AArch64's place

2014-05-24 12:50:23 +00:00

AArch64MCInstLower.cpp

Replace some assert(0)'s with llvm_unreachable.

2014-06-18 05:05:13 +00:00

AArch64MCInstLower.h

AArch64/ARM64: move ARM64 into AArch64's place

2014-05-24 12:50:23 +00:00

AArch64PerfectShuffle.h

AArch64/ARM64: move ARM64 into AArch64's place

2014-05-24 12:50:23 +00:00

AArch64PromoteConstant.cpp

Run sort_includes.py on the AArch64 backend.

2014-07-25 11:42:14 +00:00

AArch64RegisterInfo.cpp

Have MachineFunction cache a pointer to the subtarget to make lookups

2014-08-05 02:39:49 +00:00

AArch64RegisterInfo.h

AArch64/ARM64: move ARM64 into AArch64's place

2014-05-24 12:50:23 +00:00

AArch64RegisterInfo.td

AArch64: disallow x30 & x29 as the destination for indirect tail calls

2014-06-10 10:50:24 +00:00

AArch64SchedA53.td

Fix typos

2014-05-31 21:26:28 +00:00

AArch64SchedA57.td

[AArch64] Basic Sched Model for Cortex-A57.

2014-06-11 21:06:56 +00:00

AArch64SchedA57WriteRes.td

[AArch64] Basic Sched Model for Cortex-A57.

2014-06-11 21:06:56 +00:00

AArch64SchedCyclone.td

AArch64/ARM64: move ARM64 into AArch64's place

2014-05-24 12:50:23 +00:00

AArch64Schedule.td

AArch64/ARM64: move ARM64 into AArch64's place

2014-05-24 12:50:23 +00:00

AArch64SelectionDAGInfo.cpp

Remove the TargetMachine forwards for TargetSubtargetInfo based

2014-08-04 21:25:23 +00:00

AArch64SelectionDAGInfo.h

Have AArch64SelectionDAGInfo take a DataLayout parameter rather

2014-06-10 18:06:28 +00:00

AArch64StorePairSuppress.cpp

Have MachineFunction cache a pointer to the subtarget to make lookups

2014-08-05 02:39:49 +00:00

AArch64Subtarget.cpp

Move to a private function to initialize the subtarget dependencies

2014-06-11 00:46:34 +00:00

AArch64Subtarget.h

[AArch64] Add a few isTarget* API to AArch64 Subtarget.

2014-08-06 16:56:58 +00:00

AArch64TargetMachine.cpp

[AArch64] Add an FP load balancing pass for Cortex-A57

2014-08-08 12:33:21 +00:00

AArch64TargetMachine.h

Remove the TargetMachine forwards for TargetSubtargetInfo based

2014-08-04 21:25:23 +00:00

AArch64TargetObjectFile.cpp

AArch64/ARM64: move ARM64 into AArch64's place

2014-05-24 12:50:23 +00:00

AArch64TargetObjectFile.h

AArch64/ARM64: move ARM64 into AArch64's place

2014-05-24 12:50:23 +00:00

AArch64TargetTransformInfo.cpp

Teach the SLP Vectorizer that keeping some values live over a callsite can have a cost.

2014-08-05 12:30:34 +00:00

CMakeLists.txt

[AArch64] Add an FP load balancing pass for Cortex-A57

2014-08-08 12:33:21 +00:00

LLVMBuild.txt

Prune redundant libdeps.

2014-07-24 11:45:27 +00:00

Makefile

AArch64/ARM64: move ARM64 into AArch64's place

2014-05-24 12:50:23 +00:00