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llvm-6502/test/CodeGen/X86
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Nadav Rotem 5d1f5c1737 Revert revision 171524. Original message: 
URL: http://llvm.org/viewvc/llvm-project?rev=171524&view=rev
Log:
The current Intel Atom microarchitecture has a feature whereby when a function
returns early then it is slightly faster to execute a sequence of NOP
instructions to wait until the return address is ready,
as opposed to simply stalling on the ret instruction
until the return address is ready.

When compiling for X86 Atom only, this patch will run a pass, called
"X86PadShortFunction" which will add NOP instructions where less than four
cycles elapse between function entry and return.

It includes tests.

Patch by Andy Zhang.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171603 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-05 05:42:48 +00:00
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2011-08-29-BlockConstant.ll
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2011-08-29-InitOrder.ll
…
2011-09-14-valcoalesce.ll
…
2011-09-18-sse2cmp.ll
…
2011-09-21-setcc-bug.ll
…
2011-10-11-SpillDead.ll
…
2011-10-11-srl.ll
…
2011-10-12-MachineCSE.ll
…
2011-10-18-FastISel-VectorParams.ll
…
2011-10-19-LegelizeLoad.ll
Optimized load + SIGN_EXTEND patterns in the X86 backend.
2012-12-19 07:50:20 +00:00
2011-10-19-widen_vselect.ll
…
2011-10-21-widen-cmp.ll
…
2011-10-27-tstore.ll
…
2011-10-30-padd.ll
…
2011-11-07-LegalizeBuildVector.ll
…
2011-11-22-AVX2-Domains.ll
…
2011-11-30-or.ll
Teach DAG combine to handle vector logical operations with vectors of all 1s or all 0s. These cases can show up when vectors are split for legalizing. Fix some tests that were dependent on these cases not being combined.
2012-12-08 22:49:19 +00:00
2011-12-8-bitcastintprom.ll
…
2011-12-06-AVXVectorExtractCombine.ll
…
2011-12-06-BitcastVectorGlobal.ll
…
2011-12-08-AVXISelBugs.ll
…
2011-12-15-vec_shift.ll
…
2011-12-26-extractelement-duplicate-load.ll
…
2011-12-28-vselecti8.ll
When we use the BLEND instruction that uses the MSB as a mask, we can remove
2012-12-07 21:43:11 +00:00
2011-20-21-zext-ui2fp.ll
…
2012-1-10-buildvector.ll
…
2012-01-10-UndefExceptionEdge.ll
…
2012-01-11-split-cv.ll
…
2012-01-12-extract-sv.ll
…
2012-01-16-mfence-nosse-flags.ll
…
2012-01-18-vbitcast.ll
Enable lowering ZERO_EXTEND/ANY_EXTEND to PMOVZX from SSE4.1
2012-10-23 17:34:00 +00:00
2012-02-12-dagco.ll
…
2012-02-14-scalar.ll
…
2012-02-20-MachineCPBug.ll
…
2012-02-23-mmx-inlineasm.ll
…
2012-02-29-CoalescerBug.ll
…
2012-03-15-build_vector_wl.ll
Enable lowering ZERO_EXTEND/ANY_EXTEND to PMOVZX from SSE4.1
2012-10-23 17:34:00 +00:00
2012-03-20-LargeConstantExpr.ll
…
2012-03-26-PostRALICMBug.ll
…
2012-04-09-TwoAddrPassBug.ll
…
2012-04-26-sdglue.ll
Merge AVX_SET0PSY/AVX_SET0PDY/AVX2_SET0 into a single post-RA pseudo.
2012-08-28 07:05:28 +00:00
2012-05-17-TwoAddressBug.ll
…
2012-05-19-avx2-store.ll
…
2012-05-19-CoalescerCrash.ll
…
2012-07-10-extload64.ll
Enable lowering ZERO_EXTEND/ANY_EXTEND to PMOVZX from SSE4.1
2012-10-23 17:34:00 +00:00
2012-07-10-shufnorm.ll
…
2012-07-15-broadcastfold.ll
llvm/test/CodeGen/X86/2012-07-15-broadcastfold.ll: Loosen expression corresponding to r168627. Win32 and *bsd were affected.
2012-11-27 00:48:27 +00:00
2012-07-15-BuildVectorPromote.ll
move X86-specific test
2012-12-11 00:36:43 +00:00
2012-07-15-tconst_shl.ll
…
2012-07-15-vshl.ll
…
2012-07-16-fp2ui-i1.ll
…
2012-07-16-LeaUndef.ll
…
2012-07-17-vtrunc.ll
…
2012-07-23-select_cc.ll
…
2012-08-07-CmpISelBug.ll
…
2012-08-16-setcc.ll
…
2012-08-17-legalizer-crash.ll
…
2012-08-28-UnsafeMathCrash.ll
The commutative flag is already correctly set within the multiclass. If we set
2012-08-28 07:36:46 +00:00
2012-09-13-dagco-fneg.ll
Fix a dagcombine optimization. The optimization attempts to optimize a bitcast of fneg to integers
2012-09-13 14:54:28 +00:00
2012-09-28-CGPBug.ll
Do not delete BBs if their addresses are taken. rdar://12396696
2012-09-28 23:58:57 +00:00
2012-10-02-DAGCycle.ll
Follow up to r165072. Try a different approach: only move the load when it's going to be folded into the call. rdar://12437604
2012-10-05 01:48:22 +00:00
2012-10-03-DAGCycle.ll
Fix a cycle in the DAG. In this code we replace multiple loads with a single load and
2012-10-03 19:30:31 +00:00
2012-10-18-crash-dagco.ll
In SimplifySelectOps we pulled two loads through a select node despite the fact that one was dependent on the other.
2012-10-18 18:06:48 +00:00
2012-11-28-merge-store-alias.ll
When combining consecutive stores allow loads in between the stores, if the loads do not alias.
2012-11-29 00:00:08 +00:00
2012-11-30-handlemove-dbg.ll
misched: Fix LiveInterval update to better handle DebugVal.
2012-12-01 01:22:41 +00:00
2012-11-30-misched-dbg.ll
RegisterPressureTracker: fix findUseBetween to handle DebugValue
2012-12-05 21:37:50 +00:00
2012-11-30-regpres-dbg.ll
misched: Fix RegisterPressureTracker handling of DebugVals.
2012-12-01 01:22:49 +00:00
2012-12-1-merge-multiple.ll
Allow merging multiple store sequences on the same chain.
2012-12-02 17:14:09 +00:00
2012-12-06-python27-miscompile.ll
Fix a bug in the code that merges consecutive stores. Previously we did not
2012-12-06 17:34:13 +00:00
2012-12-12-DAGCombineCrash.ll
Fix a bug in DAGCombiner::MatchBSwapHWord. Make sure the node has operands before referencing them. rdar://12868039
2012-12-13 01:34:32 +00:00
2012-12-14-v8fp80-crash.ll
TypeLegalizer: Do not generate target specific nodes with illegal types, because we cant type-legalize them.
2012-12-14 21:20:37 +00:00
2012-12-19-NoImplicitFloat.ll
Do not introduce vector operations in functions marked with noimplicitfloat.
2012-12-20 01:36:20 +00:00
9601.ll
…
20090313-signext.ll
…
abi-isel.ll
…
add-of-carry.ll
(For X86) Enhancement to add-carray/sub-borrow (adc/sbb) optimization.
2012-10-31 23:11:48 +00:00
add.ll
…
adde-carry.ll
…
addr-label-difference.ll
…
aliases.ll
…
aligned-comm.ll
…
alignment-2.ll
…
alignment.ll
…
all-ones-vector.ll
…
alldiv-divdi3.ll
…
alloca-align-rounding-32.ll
…
alloca-align-rounding.ll
…
allrem-moddi3.ll
…
and-or-fold.ll
…
and-su.ll
…
andimm8.ll
…
anyext.ll
…
apm.ll
…
arg-cast.ll
…
asm-block-labels.ll
…
asm-global-imm.ll
…
asm-indirect-mem.ll
…
asm-label2.ll
…
asm-label.ll
…
asm-modifier-P.ll
…
asm-modifier.ll
…
asm-reg-type-mismatch.ll
…
atom-bypass-slow-division.ll
llvm/test/CodeGen/X86/atom-bypass-slow-division.ll: Fix possible typo(s) in CHECK-NOT lines.
2012-12-12 13:34:20 +00:00
atom-lea-sp.ll
…
atom-sched.ll
…
atom-shuf.ll
Add test for ATOM ISA SSSE3
2012-10-25 17:50:05 +00:00
atomic8.ll
Add missing i8 max/min/umax/umin support
2012-09-21 03:18:52 +00:00
atomic16.ll
Revise test to avoid using of 'grep'
2012-09-23 02:41:47 +00:00
atomic32.ll
Re-work X86 code generation of atomic ops with spin-loop
2012-09-20 03:06:15 +00:00
atomic64.ll
Re-work X86 code generation of atomic ops with spin-loop
2012-09-20 03:06:15 +00:00
atomic6432.ll
Add missing i64 max/min/umax/umin on 32-bit target
2012-09-25 18:08:13 +00:00
atomic_add.ll
Unify the logic in SelectAtomicLoadAdd and SelectAtomicLoadArith
2012-09-19 19:36:58 +00:00
atomic_op.ll
Re-work X86 code generation of atomic ops with spin-loop
2012-09-20 03:06:15 +00:00
atomic-load-store-wide.ll
…
atomic-load-store.ll
…
atomic-minmax-i6432.ll
When expanding atomic load arith instructions, do not lose target flags. rdar://12453106
2012-10-09 23:48:33 +00:00
atomic-or.ll
…
atomic-pointer.ll
…
Atomics-64.ll
…
attribute-sections.ll
…
avoid-lea-scale2.ll
…
avoid-loop-align-2.ll
…
avoid-loop-align.ll
…
avx2-arith.ll
…
avx2-cmp.ll
…
avx2-conversions.ll
Optimized load + SIGN_EXTEND patterns in the X86 backend.
2012-12-19 07:50:20 +00:00
avx2-intrinsics-x86.ll
…
avx2-logic.ll
X86: Match pmin/pmax as a target specific dag combine. This occurs during vectorization.
2012-12-21 17:46:58 +00:00
avx2-nontemporal.ll
…
avx2-palignr.ll
…
avx2-phaddsub.ll
…
avx2-shift.ll
…
avx2-shuffle.ll
Simplified BLEND pattern matching for shuffles.
2012-12-05 09:24:57 +00:00
avx2-unpack.ll
…
avx2-vbroadcast.ll
…
avx2-vperm2i128.ll
…
avx2-vperm.ll
…
avx-arith.ll
…
avx-basic.ll
Teach DAG combiner to constant fold fneg of a BUILD_VECTOR of constants.
2012-09-09 22:58:45 +00:00
avx-bitcast.ll
…
avx-blend.ll
…
avx-cast.ll
…
avx-cmp.ll
…
avx-cvt.ll
…
avx-fp2int.ll
…
avx-intel-ocl.ll
Remove the X86 Maximal Stack Alignment Check pass as it is no longer necessary.
2012-11-26 22:55:05 +00:00
avx-intrinsics-x86_64.ll
…
avx-intrinsics-x86.ll
X86: Prefer using VPSHUFD over VPERMIL because it has better throughput.
2012-12-07 19:01:13 +00:00
avx-load-store.ll
…
avx-logic.ll
…
avx-minmax.ll
…
avx-movdup.ll
…
avx-select.ll
…
avx-sext.ll
X86: Emit vector sext as shuffle + sra if vpmovsx is not available.
2012-12-22 11:34:28 +00:00
avx-shift.ll
…
avx-shuffle-x86_32.ll
…
avx-shuffle.ll
X86: Prefer using VPSHUFD over VPERMIL because it has better throughput.
2012-12-07 19:01:13 +00:00
avx-splat.ll
X86: Prefer using VPSHUFD over VPERMIL because it has better throughput.
2012-12-07 19:01:13 +00:00
avx-trunc.ll
Revert revision: 171467. This transformation is incorrect and makes some tests fail. Original message:
2013-01-04 17:35:21 +00:00
avx-unpack.ll
…
avx-varargs-x86_64.ll
…
avx-vbroadcast.ll
…
avx-vextractf128.ll
Add patterns for converting stores of subvector_extracts of lower 128-bits of a 256-bit vector to VMOVAPSmr/VMOVUPSmr.
2012-09-06 05:15:01 +00:00
avx-vinsertf128.ll
…
avx-vmovddup.ll
…
avx-vperm2f128.ll
…
avx-vpermil.ll
…
avx-vshufp.ll
…
avx-vzeroupper.ll
…
avx-win64-args.ll
…
avx-win64.ll
…
avx-zext.ll
AVX: Move the ZEXT/ANYEXT DAGCo optimizations to the lowering of these optimizations. The old test cases still cover all of these lowering/optimizations. The single change that we have is that now anyext does not need to zero a register, because it does not use the exact code path as the zero_extend.
2012-12-28 05:45:24 +00:00
barrier-sse.ll
…
barrier.ll
…
basic-promote-integers.ll
…
bc-extract.ll
…
bigstructret2.ll
…
bigstructret.ll
…
bit-test-shift.ll
…
bitcast2.ll
…
bitcast-i256.ll
Enhance type legalization on bitcast from vector to integer
2012-09-13 19:58:21 +00:00
bitcast-int-to-vector.ll
…
bitcast.ll
…
blend-msb.ll
When we use the BLEND instruction that uses the MSB as a mask, we can remove
2012-12-07 21:43:11 +00:00
block-placement.ll
…
bmi.ll
Add rest of BMI/BMI2 instructions to the folding tables as well as popcnt and lzcnt.
2012-12-17 05:02:29 +00:00
bool-simplify.ll
Add boolean simplification support from CMOV
2012-09-10 16:36:16 +00:00
bool-zext.ll
…
br-fold.ll
…
brcond.ll
…
break-anti-dependencies.ll
…
break-sse-dep.ll
…
bss_pagealigned.ll
…
bswap-inline-asm.ll
…
bswap.ll
…
bt.ll
Add x86 isel lowering logic to form bit test with inverted condition. e.g.
2012-12-05 00:10:38 +00:00
btq.ll
…
buildvec-insertvec.ll
Lower BUILD_VECTOR to SHUFFLE + INSERT_VECTOR_ELT for X86
2012-10-19 17:15:18 +00:00
byval2.ll
Make sure to not get AVX code on an AVX-capable host. Revealed in r167967.
2012-11-14 22:24:01 +00:00
byval3.ll
Make sure to not get AVX code on an AVX-capable host. Revealed in r167967.
2012-11-14 22:24:01 +00:00
byval4.ll
Make sure to not get AVX code on an AVX-capable host. Revealed in r167967.
2012-11-14 22:24:01 +00:00
byval5.ll
Make sure to not get AVX code on an AVX-capable host. Revealed in r167967.
2012-11-14 22:24:01 +00:00
byval6.ll
…
byval7.ll
…
byval-align.ll
…
byval.ll
…
call-imm.ll
…
call-push.ll
…
cfstring.ll
…
change-compare-stride-1.ll
…
change-compare-stride-trickiness-0.ll
…
change-compare-stride-trickiness-1.ll
…
change-compare-stride-trickiness-2.ll
…
clobber-fi0.ll
In some cases, due to scheduling constraints we copy the EFLAGS.
2012-12-21 23:48:49 +00:00
clz.ll
…
cmov-fp.ll
X86: fcmov doesn't handle all possible EFLAGS, fall back to a branch for the others.
2012-10-07 15:34:27 +00:00
cmov-into-branch.ll
…
cmov.ll
…
cmp.ll
Teach SimplifySetCC that comparing AssertZext i1 against a constant 1 can be rewritten as a compare against a constant 0 with the opposite condition.
2012-12-19 06:12:28 +00:00
cmpxchg16b.ll
…
coalesce-esp.ll
…
coalesce-implicitdef.ll
Fix PR14732 by handling all kinds of IMPLICIT_DEF live ranges.
2013-01-03 00:47:51 +00:00
coalescer-commute1.ll
…
coalescer-commute2.ll
…
coalescer-commute3.ll
…
coalescer-commute4.ll
…
coalescer-commute5.ll
…
coalescer-cross.ll
…
coalescer-dce2.ll
…
coalescer-dce.ll
…
coalescer-identity.ll
…
coalescer-remat.ll
…
code_placement_eh.ll
…
code_placement.ll
…
codegen-prepare-cast.ll
…
codegen-prepare-extload.ll
…
codemodel.ll
…
combine-lds.ll
…
combiner-aa-0.ll
…
combiner-aa-1.ll
…
commute-intrinsic.ll
…
commute-two-addr.ll
…
compare_folding.ll
…
compare-add.ll
…
compare-inf.ll
…
compiler_used.ll
…
complex-asm.ll
…
complex-fca.ll
…
conditional-indecrement.ll
…
constant-pool-remat-0.ll
…
constant-pool-sharing.ll
…
constpool.ll
…
constructor.ll
…
convert-2-addr-3-addr-inc64.ll
…
copysign-zero.ll
…
crash-nosse.ll
…
crash-O0.ll
…
crash.ll
Never attempt to join an early-clobber def with a regular kill.
2012-10-27 17:41:27 +00:00
critical-edge-split-2.ll
…
cstring.ll
…
ctpop-combine.ll
…
cvtv2f32.ll
DAGCombiner: Avoid generating illegal vector INT_TO_FP nodes
2013-01-02 22:13:01 +00:00
dag-rauw-cse.ll
…
dagcombine-buildvector.ll
…
dagcombine-cse.ll
…
darwin-bzero.ll
…
darwin-no-dead-strip.ll
…
darwin-quote.ll
…
darwin-stub.ll
…
dbg-at-specficiation.ll
Use the 'count' attribute to calculate the upper bound of an array.
2012-12-04 21:34:03 +00:00
dbg-byval-parameter.ll
…
dbg-const-int.ll
…
dbg-const.ll
…
dbg-declare-arg.ll
…
dbg-declare.ll
Use the 'count' attribute to calculate the upper bound of an array.
2012-12-04 21:34:03 +00:00
dbg-file-name.ll
…
dbg-i128-const.ll
…
dbg-large-unsigned-const.ll
…
dbg-merge-loc-entry.ll
…
dbg-prolog-end.ll
…
dbg-subrange.ll
Use the 'count' attribute to calculate the upper bound of an array.
2012-12-04 21:34:03 +00:00
dbg-value-dag-combine.ll
…
dbg-value-isel.ll
…
dbg-value-location.ll
…
dbg-value-range.ll
…
discontiguous-loops.ll
…
div8.ll
…
divide-by-constant.ll
…
divrem.ll
…
dll-linkage.ll
…
dllexport.ll
…
dollar-name.ll
…
dwarf-comp-dir.ll
…
dyn-stackalloc.ll
…
dynamic-allocas-VLAs.ll
Remove the X86 Maximal Stack Alignment Check pass as it is no longer necessary.
2012-11-26 22:55:05 +00:00
early-ifcvt-crash.ll
Pass an explicit operand number to addLiveIns.
2012-10-11 16:46:07 +00:00
early-ifcvt.ll
Revert "Mark DIV/IDIV instructions hasSideEffects=1 because they can trap when dividing by 0. This is needed to keep early if conversion from moving them across basic blocks."
2013-01-03 08:18:30 +00:00
eh_frame.ll
…
empty-functions.ll
…
empty-struct-return-type.ll
…
epilogue.ll
…
extend.ll
…
extern_weak.ll
…
extmul64.ll
…
extmul128.ll
…
extract-combine.ll
…
extract-concat.ll
Revert part of r166049 back and enable test case in r166125.
2012-10-17 23:45:54 +00:00
extract-extract.ll
…
extractelement-from-arg.ll
…
extractelement-load.ll
…
extractelement-shuffle.ll
…
extractps.ll
…
f16c-intrinsics.ll
…
fabs.ll
…
fast-cc-callee-pops.ll
Change x86_fastcallcc to require inreg markers. This allows it to known
2012-10-24 01:58:48 +00:00
fast-cc-merge-stack-adj.ll
Change x86_fastcallcc to require inreg markers. This allows it to known
2012-10-24 01:58:48 +00:00
fast-cc-pass-in-regs.ll
Change x86_fastcallcc to require inreg markers. This allows it to known
2012-10-24 01:58:48 +00:00
fast-isel-agg-constant.ll
…
fast-isel-atomic.ll
…
fast-isel-avoid-unnecessary-pic-base.ll
…
fast-isel-bail.ll
…
fast-isel-bc.ll
…
fast-isel-call.ll
…
fast-isel-cmp-branch.ll
…
fast-isel-constpool.ll
…
fast-isel-extract.ll
…
fast-isel-fneg.ll
…
fast-isel-gep.ll
…
fast-isel-gv.ll
…
fast-isel-i1.ll
…
fast-isel-mem.ll
…
fast-isel-ret-ext.ll
…
fast-isel-tailcall.ll
…
fast-isel-tls.ll
…
fast-isel-x86-64.ll
Revert revision 171524. Original message:
2013-01-05 05:42:48 +00:00
fast-isel-x86.ll
…
fast-isel.ll
…
fastcall-correct-mangling.ll
…
fastcc3struct.ll
…
fastcc-2.ll
…
fastcc-byval.ll
…
fastcc-sret.ll
…
fastcc.ll
…
fdiv.ll
…
field-extract-use-trunc.ll
…
fildll.ll
…
fltused_function_pointer.ll
…
fltused.ll
…
fma3-intrinsics.ll
…
fma4-intrinsics-x86_64.ll
Add test cases for r168417.
2012-11-27 07:19:54 +00:00
fma_patterns.ll
Mark FMA4 instructions as commutable and add them to the folding tables.
2012-08-31 23:10:34 +00:00
fma.ll
llvm/test/CodeGen/X86/fma.ll: Add -march=x86, or two tests would fail on non-x86 hosts.
2012-08-27 11:50:26 +00:00
fmul-zero.ll
…
fold-add.ll
…
fold-and-shift.ll
…
fold-call-2.ll
…
fold-call-3.ll
…
fold-call.ll
…
fold-imm.ll
…
fold-load-vec.ll
X86: do not fold load instructions such as [V]MOVS[S|D] to other instructions
2012-11-27 18:09:26 +00:00
fold-load.ll
…
fold-mul-lohi.ll
…
fold-pcmpeqd-0.ll
…
fold-pcmpeqd-1.ll
…
fold-pcmpeqd-2.ll
Teach DAG combine to handle vector add/sub with vectors of all 0s.
2012-12-10 08:12:29 +00:00
fold-sext-trunc.ll
…
fold-vex.ll
llvm/test/CodeGen/X86/fold-vex.ll: Add explicit triple.
2012-12-24 11:14:06 +00:00
fold-xmm-zero.ll
…
fold-zext-trunc.ll
…
force-align-stack-alloca.ll
…
force-align-stack.ll
…
fp2sint.ll
…
fp_constant_op.ll
…
fp_load_cast_fold.ll
…
fp_load_fold.ll
…
fp-elim.ll
…
fp-fast.ll
test/CodeGen/X86/fp-fast.ll: Add +avx.
2012-11-01 02:13:45 +00:00
fp-immediate-shorten.ll
…
fp-in-intregs.ll
…
fp-load-trunc.ll
Specify CPU model to avoid breaking ATOM builds
2012-10-10 18:04:52 +00:00
fp-stack-2results.ll
…
fp-stack-compare-cmov.ll
…
fp-stack-compare.ll
…
fp-stack-direct-ret.ll
…
fp-stack-O0-crash.ll
…
fp-stack-O0.ll
…
fp-stack-ret-conv.ll
…
fp-stack-ret-store.ll
…
fp-stack-ret.ll
…
fp-stack-retcopy.ll
…
fp-stack-set-st1.ll
…
fp-stack.ll
…
fp-trunc.ll
Specify CPU model to avoid breaking ATOM builds
2012-10-10 18:04:52 +00:00
fsgsbase.ll
…
fsxor-alignment.ll
…
full-lsr.ll
…
ga-offset.ll
…
gather-addresses.ll
…
gcc_except_table.ll
…
ghc-cc64.ll
…
ghc-cc.ll
…
global-sections-tls.ll
…
global-sections.ll
…
gs-fold.ll
…
h-register-addressing-32.ll
…
h-register-addressing-64.ll
…
h-register-store.ll
…
h-registers-0.ll
…
h-registers-1.ll
…
h-registers-2.ll
…
h-registers-3.ll
…
haddsub.ll
…
handle-move.ll
Fix buildbots: -misched=shuffle is only available in +Asserts builds.
2012-10-12 23:01:33 +00:00
hidden-vis-2.ll
…
hidden-vis-3.ll
…
hidden-vis-4.ll
…
hidden-vis-pic.ll
…
hidden-vis.ll
…
hipe-cc64.ll
llvm/test/CodeGen/X86/hipe-cc*.ll: Add explicit -mcpu, or they don't expect to pass on Atom.
2012-11-16 16:07:37 +00:00
hipe-cc.ll
llvm/test/CodeGen/X86/hipe-cc*.ll: Add explicit -mcpu, or they don't expect to pass on Atom.
2012-11-16 16:07:37 +00:00
hoist-common.ll
…
hoist-invariant-load.ll
…
i2k.ll
…
i64-mem-copy.ll
…
i128-and-beyond.ll
…
i128-immediate.ll
…
i128-mul.ll
…
i128-ret.ll
…
i128-sdiv.ll
…
i256-add.ll
…
iabs.ll
…
illegal-insert.ll
…
illegal-vector-args-return.ll
…
imul-lea-2.ll
…
imul-lea.ll
…
inline-asm-2addr.ll
…
inline-asm-error.ll
…
inline-asm-flag-clobber.ll
…
inline-asm-fpstack.ll
…
inline-asm-h.ll
Fix darwin bots.
2011-01-01 21:58:41 +00:00
inline-asm-modifier-n.ll
…
inline-asm-mrv.ll
…
inline-asm-out-regs.ll
…
inline-asm-pic.ll
…
inline-asm-ptr-cast.ll
…
inline-asm-q-regs.ll
…
inline-asm-R-constraint.ll
…
inline-asm-tied.ll
Don't enforce ordered inline asm operands.
2012-08-31 15:34:59 +00:00
inline-asm-x-scalar.ll
…
inline-asm.ll
Handle mixed normal and early-clobber defs on inline asm.
2012-11-19 19:31:10 +00:00
inlineasm-sched-bug.ll
This patch addresses a problem with the Post RA scheduler generating an
2012-10-29 15:01:23 +00:00
inreg.ll
…
ins_subreg_coalesce-1.ll
…
ins_subreg_coalesce-2.ll
…
ins_subreg_coalesce-3.ll
…
insert-positions.ll
…
insertelement-copytoregs.ll
…
insertelement-legalize.ll
…
int-intrinsic.ll
…
invalid-shift-immediate.ll
…
isel-sink2.ll
…
isel-sink3.ll
…
isel-sink.ll
…
isint.ll
…
isnan2.ll
…
isnan.ll
…
ispositive.ll
…
jump_sign.ll
(For X86) Enhancement to add-carray/sub-borrow (adc/sbb) optimization.
2012-10-31 23:11:48 +00:00
label-redefinition.ll
…
large-gep-scale.ll
…
large-global.ll
…
ldzero.ll
…
lea-2.ll
…
lea-3.ll
…
lea-4.ll
…
lea-recursion.ll
…
lea.ll
…
leaf-fp-elim.ll
…
legalize-fmp-oeq-vector-select.ll
…
legalize-libcalls.ll
…
legalize-shift-64.ll
…
legalize-sub-zero-2.ll
…
legalize-sub-zero.ll
…
legalizedag_vec.ll
…
lfence.ll
…
licm-dominance.ll
…
licm-nested.ll
…
licm-symbol.ll
…
limited-prec.ll
…
lit.local.cfg
…
live-out-reg-info.ll
…
liveness-local-regalloc.ll
…
lock-inst-encoding.ll
…
log2_not_readnone.ll
…
long-setcc.ll
…
longlong-deadload.ll
…
loop-blocks.ll
…
loop-hoist.ll
…
loop-strength-reduce2.ll
…
loop-strength-reduce4.ll
…
loop-strength-reduce5.ll
…
loop-strength-reduce6.ll
…
loop-strength-reduce7.ll
…
loop-strength-reduce8.ll
…
loop-strength-reduce-2.ll
Revert r164910 because it causes failures to several phase2 builds.
2012-09-30 07:17:56 +00:00
loop-strength-reduce-3.ll
Revert r164910 because it causes failures to several phase2 builds.
2012-09-30 07:17:56 +00:00
loop-strength-reduce.ll
Revert r164910 because it causes failures to several phase2 builds.
2012-09-30 07:17:56 +00:00
lsr-delayed-fold.ll
…
lsr-i386.ll
…
lsr-interesting-step.ll
…
lsr-loop-exit-cond.ll
…
lsr-negative-stride.ll
…
lsr-nonaffine.ll
…
lsr-normalization.ll
…
lsr-overflow.ll
…
lsr-quadratic-expand.ll
…
lsr-redundant-addressing.ll
…
lsr-reuse-trunc.ll
…
lsr-reuse.ll
…
lsr-sort.ll
…
lsr-static-addr.ll
…
lsr-wrap.ll
…
lzcnt.ll
…
machine-cp.ll
…
machine-cse.ll
…
MachineSink-CritEdge.ll
…
MachineSink-DbgValue.ll
…
MachineSink-eflags.ll
…
MachineSink-PHIUse.ll
…
masked-iv-safe.ll
…
masked-iv-unsafe.ll
…
maskmovdqu.ll
…
mcinst-avx-lowering.ll
…
mcinst-lowering.ll
…
mem-promote-integers.ll
…
membarrier.ll
…
memcmp.ll
…
memcpy-2.ll
Avoid using lossy load / stores for memcpy / memset expansion. e.g.
2012-12-12 00:42:09 +00:00
memcpy.ll
…
memset64-on-x86-32.ll
X86: Enable SSE memory intrinsics even when stack alignment is less than 16 bytes.
2012-11-14 20:08:40 +00:00
memset-2.ll
…
memset-3.ll
…
memset-sse-stack-realignment.ll
X86: Enable SSE memory intrinsics even when stack alignment is less than 16 bytes.
2012-11-14 20:08:40 +00:00
memset.ll
llvm/test/CodeGen/X86/memset.ll: FileCheck-ize, and add another case on +avx.
2012-11-14 21:01:40 +00:00
MergeConsecutiveStores.ll
When merging connsecutive stores, use vectors to store the constant zero.
2012-10-04 22:35:15 +00:00
mfence.ll
…
mingw-alloca.ll
…
misaligned-memset.ll
…
misched-balance.ll
misched: Heuristics based on the machine model.
2012-11-07 07:05:09 +00:00
misched-ilp.ll
misched tests: add a triple to speculatively fix windows builders.
2012-10-15 18:21:08 +00:00
misched-matrix.ll
misched: Analysis that partitions the DAG into subtrees.
2012-11-28 05:13:28 +00:00
misched-new.ll
RegisterPresssureTracker: Track live physical register by unit.
2012-12-05 21:37:42 +00:00
mmx-arg-passing2.ll
…
mmx-arg-passing.ll
…
mmx-arith.ll
…
mmx-bitcast-to-i64.ll
…
mmx-builtins.ll
X86 MMX: optimize transfer from mmx to i32
2012-10-30 22:15:38 +00:00
mmx-copy-gprs.ll
…
mmx-emms.ll
…
mmx-insert-element.ll
…
mmx-pinsrw.ll
…
mmx-punpckhdq.ll
…
mmx-s2v.ll
…
mmx-shift.ll
…
mmx-shuffle.ll
…
movbe.ll
…
movfs.ll
…
movgs.ll
…
movmsk.ll
…
movntdq-no-avx.ll
…
ms-inline-asm.ll
Remove redundant test case from r166949, per Eli's suggestion.
2012-10-29 18:18:26 +00:00
mul64.ll
…
mul128.ll
…
mul-legalize.ll
…
mul-remat.ll
…
mul-shift-reassoc.ll
…
muloti.ll
…
mult-alt-generic-i686.ll
…
mult-alt-generic-x86_64.ll
…
mult-alt-x86.ll
…
multiple-loop-post-inc.ll
…
multiple-return-values-cross-block.ll
…
mulx32.ll
llvm/test/CodeGen/X86/mulx*.ll: Fix copypasto.
2012-09-26 09:24:12 +00:00
mulx64.ll
llvm/test/CodeGen/X86/mulx*.ll: Fix copypasto.
2012-09-26 09:24:12 +00:00
nancvt.ll
…
narrow_op-1.ll
…
narrow-shl-cst.ll
…
narrow-shl-load.ll
…
neg_cmp.ll
…
neg_fp.ll
…
neg-shl-add.ll
…
negate-add-zero.ll
…
negative_zero.ll
…
negative-sin.ll
…
negative-stride-fptosi-user.ll
…
negative-subscript.ll
…
no-cfi.ll
…
nobt.ll
…
non-lazy-bind.ll
…
nontemporal.ll
…
norex-subreg.ll
…
nosse-error1.ll
…
nosse-error2.ll
…
nosse-varargs.ll
…
null-streamer.ll
…
objc-gc-module-flags.ll
…
object-size.ll
…
odr_comdat.ll
…
opt-ext-uses.ll
…
opt-shuff-tstore.ll
…
optimize-max-0.ll
…
optimize-max-1.ll
…
optimize-max-2.ll
…
optimize-max-3.ll
…
or-address.ll
…
or-branch.ll
…
overlap-shift.ll
…
packed_struct.ll
…
palignr-2.ll
…
palignr.ll
…
pass-three.ll
…
peep-setb.ll
…
peep-test-0.ll
…
peep-test-1.ll
…
peep-test-2.ll
…
peep-test-3.ll
…
peep-vector-extract-concat.ll
…
peep-vector-extract-insert.ll
…
personality_size.ll
…
personality.ll
…
phaddsub.ll
…
phi-bit-propagation.ll
…
phi-immediate-factoring.ll
…
phielim-split.ll
…
phys_subreg_coalesce-2.ll
…
phys_subreg_coalesce-3.ll
Add SARX/SHRX/SHLX code generation support
2012-09-26 08:26:25 +00:00
phys_subreg_coalesce.ll
…
phys-reg-local-regalloc.ll
…
pic_jumptable.ll
Mark jump tables in code sections with DataRegion directives.
2012-09-24 23:06:27 +00:00
pic-load-remat.ll
…
pic.ll
…
pmovext.ll
Fix the testcase to work on all platforms.
2012-09-16 07:58:47 +00:00
pmul.ll
…
pmulld.ll
…
pointer-vector.ll
Tests: rewrite 'opt ... %s' to 'opt ... < %s' so that opt does not emit a ModuleID
2012-12-30 02:33:22 +00:00
popcnt.ll
…
postalloc-coalescing.ll
…
postra-licm.ll
…
powi.ll
…
pr1462.ll
…
pr1489.ll
…
pr1505.ll
…
pr1505b.ll
…
pr2177.ll
…
pr2182.ll
…
pr2326.ll
…
pr2656.ll
…
pr2659.ll
…
pr2849.ll
…
pr2924.ll
…
pr2982.ll
…
pr3154.ll
…
pr3216.ll
…
pr3241.ll
…
pr3243.ll
…
pr3244.ll
…
pr3250.ll
…
pr3317.ll
…
pr3366.ll
…
pr3457.ll
…
pr3522.ll
…
pr5145.ll
llvm/test/CodeGen/X86/pr5145.ll: Tweak expressions to match for darwin target.
2012-09-21 05:19:19 +00:00
pr7882.ll
…
pr9127.ll
…
pr9743.ll
…
pr10068.ll
…
pr10420.ll
…
pr11202.ll
…
pr11334.ll
…
pr11415.ll
…
pr11468.ll
…
pr11985.ll
Fix PR11985
2012-09-12 21:43:09 +00:00
pr12312.ll
Add wider vector/integer support for PR12312
2012-09-13 20:24:54 +00:00
pr12359.ll
Fix PR12359
2012-08-31 20:12:31 +00:00
pr12360.ll
…
pr12889.ll
…
pr13209.ll
…
pr13220.ll
…
pr13458.ll
Re-work X86 code generation of atomic ops with spin-loop
2012-09-20 03:06:15 +00:00
pr13577.ll
…
pr13859.ll
Fix PR13859
2012-09-17 18:05:20 +00:00
pr13899.ll
Fix PR13899
2012-10-01 16:44:04 +00:00
pr14088.ll
Fix the cpu name and add -verify-machineinstrs.
2012-10-16 01:13:06 +00:00
pr14090.ll
Clear unknown mem ops when merging stack slots (pr14090)
2012-10-18 19:53:48 +00:00
pr14098.ll
Avoid rematerializing a redef immediately after the old def.
2012-10-16 22:51:58 +00:00
pr14161.ll
Fix PR14161
2012-10-23 21:40:15 +00:00
pr14204.ll
Fix PR14204
2012-10-29 17:57:12 +00:00
pr14314.ll
Fix test case added in patch fixing PR14314
2012-11-12 22:33:18 +00:00
pr14333.ll
Handle DAG CSE adding new uses during ReplaceAllUsesWith. Fixes PR14333.
2012-11-14 05:08:56 +00:00
prefetch.ll
…
private-2.ll
…
private.ll
…
promote-assert-zext.ll
…
promote-i16.ll
…
promote-trunc.ll
…
promote.ll
Enable lowering ZERO_EXTEND/ANY_EXTEND to PMOVZX from SSE4.1
2012-10-23 17:34:00 +00:00
psubus.ll
X86: Add a couple of target-specific dag combines that turn VSELECTS into psubus if possible.
2012-12-15 16:47:44 +00:00
ptr-rotate.ll
Add RORX code generation support
2012-09-26 08:24:51 +00:00
ptrtoint-constexpr.ll
…
rd-mod-wr-eflags.ll
…
rdrand.ll
Fix an invalid regex in the test
2012-12-02 15:46:02 +00:00
rdtsc.ll
…
red-zone2.ll
test/CodeGen/X86/red-zone2.ll: Add -mtriple=x86_64-linux, and FileCheck-ize.
2012-10-01 22:48:07 +00:00
red-zone.ll
…
reghinting.ll
…
regpressure.ll
…
rem-2.ll
…
rem.ll
…
remat-constant.ll
…
remat-fold-load.ll
…
remat-mov-0.ll
…
remat-scalar-zero.ll
…
ret-addr.ll
…
ret-i64-0.ll
…
ret-mmx.ll
Revert revision 171524. Original message:
2013-01-05 05:42:48 +00:00
reverse_branches.ll
…
rip-rel-address.ll
…
rodata-relocs.ll
…
rot16.ll
…
rot32.ll
Add RORX code generation support
2012-09-26 08:24:51 +00:00
rot64.ll
Add RORX code generation support
2012-09-26 08:24:51 +00:00
rotate2.ll
Add RORX code generation support
2012-09-26 08:24:51 +00:00
rotate.ll
…
rounding-ops.ll
…
rtm.ll
Add support of RTM from TSX extension
2012-11-08 07:28:54 +00:00
scalar_sse_minmax.ll
…
scalar_widen_div.ll
…
scalar-extract.ll
…
scalar-min-max-fill-operand.ll
…
scalarize-bitcast.ll
…
scev-interchange.ll
…
sdiv-exact.ll
…
segmented-stacks-dynamic.ll
…
segmented-stacks.ll
…
select_const.ll
Reapply r165661, Patch by Shuxin Yang <shuxin.llvm@gmail.com>.
2012-10-16 06:28:34 +00:00
select.ll
Revert revision 171524. Original message:
2013-01-05 05:42:48 +00:00
selectiondag-cse.ll
…
setcc.ll
…
setoeq.ll
…
setuge.ll
…
sext-i1.ll
…
sext-load.ll
Fix a miscompile in the DAG combiner. Previously, we would incorrectly
2012-12-11 00:36:57 +00:00
sext-ret-val.ll
…
sext-setcc-self.ll
…
sext-subreg.ll
…
sext-trunc.ll
…
sfence.ll
…
shift-and.ll
…
shift-bmi2.ll
Add SARX/SHRX/SHLX code generation support
2012-09-26 08:26:25 +00:00
shift-coalesce.ll
…
shift-codegen.ll
…
shift-combine.ll
…
shift-double.ll
…
shift-folding.ll
…
shift-i128.ll
…
shift-i256.ll
…
shift-one.ll
…
shift-pair.ll
…
shift-parts.ll
…
shl_elim.ll
…
shl_undef.ll
…
shl-anyext.ll
…
shl-i64.ll
…
shrink-compare.ll
…
shrink-fp-const1.ll
…
shrink-fp-const2.ll
…
sibcall-2.ll
…
sibcall-3.ll
…
sibcall-4.ll
…
sibcall-5.ll
…
sibcall-byval.ll
…
sibcall.ll
…
sincos.ll
X86: Emitting x87 fsin/fcos for sinf/cosf is not safe without unsafe fp math.
2012-09-15 12:44:27 +00:00
sink-hoist.ll
…
sink-out-of-loop.ll
…
sjlj.ll
Fix setjmp on models with non-Small code model nor non-Static relocation model
2012-10-17 02:22:27 +00:00
small-byval-memcpy.ll
…
smul-with-overflow.ll
Fix PR13991: legalizing an overflowing multiplication operation is harder than
2012-10-02 15:03:49 +00:00
soft-fp.ll
…
splat-scalar-load.ll
…
split-eh-lpad-edges.ll
…
split-vector-bitcast.ll
…
split-vector-rem.ll
…
sse1.ll
…
sse2-blend.ll
Teach DAG combine to handle vector logical operations with vectors of all 1s or all 0s. These cases can show up when vectors are split for legalizing. Fix some tests that were dependent on these cases not being combined.
2012-12-08 22:49:19 +00:00
sse2-mul.ll
X86: Turn mul of <4 x i32> into pmuludq when no SSE4.1 is available.
2012-12-22 16:07:56 +00:00
sse2.ll
…
sse3.ll
…
sse4a.ll
…
sse41-blend.ll
…
sse41.ll
…
sse42_64.ll
…
sse42.ll
…
sse_partial_update.ll
X86 SSE: update rsqrtss and rcpss to use two source operands and
2012-10-30 23:53:59 +00:00
sse_reload_fold.ll
…
sse-align-0.ll
…
sse-align-1.ll
…
sse-align-2.ll
llvm/test/CodeGen/X86: FileCheck-ize two tests in r171083.
2012-12-26 03:19:30 +00:00
sse-align-3.ll
…
sse-align-4.ll
…
sse-align-5.ll
…
sse-align-6.ll
…
sse-align-7.ll
…
sse-align-8.ll
…
sse-align-9.ll
…
sse-align-10.ll
…
sse-align-11.ll
…
sse-align-12.ll
…
sse-commute.ll
…
sse-domains.ll
…
sse-fcopysign.ll
…
sse-intel-ocl.ll
Special calling conventions for Intel OpenCL built-in library.
2012-10-24 14:46:16 +00:00
sse-load-ret.ll
…
sse-minmax.ll
…
sse-varargs.ll
…
stack-align2.ll
…
stack-align.ll
…
stack-protector.ll
…
StackColoring-dbg.ll
Stack Coloring: Dont crash on dbg values which use stack frames.
2012-09-11 12:34:27 +00:00
StackColoring.ll
Stack Coloring: We have code that checks that all of the uses of allocas
2012-09-13 12:38:37 +00:00
stdarg.ll
…
stdcall-notailcall.ll
…
stdcall.ll
…
store_op_load_fold2.ll
…
store_op_load_fold.ll
llvm/test/CodeGen/X86/store_op_load_fold.ll: Fix typo, s/CHECK_NEXT/CHECK-NEXT/
2012-12-12 01:41:01 +00:00
store-empty-member.ll
…
store-fp-constant.ll
…
store-global-address.ll
…
store-narrow.ll
…
storetrunc-fp.ll
…
stride-nine-with-base-reg.ll
…
stride-reuse.ll
…
sub-with-overflow.ll
…
sub.ll
…
subreg-to-reg-0.ll
…
subreg-to-reg-1.ll
…
subreg-to-reg-2.ll
…
subreg-to-reg-3.ll
…
subreg-to-reg-4.ll
…
subreg-to-reg-6.ll
…
switch-bt.ll
…
switch-crit-edge-constant.ll
…
switch-or.ll
…
switch-order-weight.ll
…
switch-zextload.ll
…
SwitchLowering.ll
…
swizzle.ll
…
SwizzleShuff.ll
…
tail-call-got.ll
…
tail-dup-addr.ll
…
tail-opts.ll
…
tail-threshold.ll
…
tailcall-64.ll
Fix an illegal tailcall opt where the callee returns a double via xmm while caller returns x86_fp80 via st0. rdar://12229511
2012-09-25 05:32:34 +00:00
tailcall-cgp-dup.ll
…
tailcall-disable.ll
…
tailcall-fastisel.ll
Add a triple to this test.
2012-12-11 00:51:36 +00:00
tailcall-largecode.ll
…
tailcall-returndup-void.ll
…
tailcall-ri64.ll
…
tailcall-stackalign.ll
…
tailcall-structret.ll
…
tailcall.ll
…
tailcallbyval64.ll
…
tailcallbyval.ll
…
tailcallfp2.ll
…
tailcallfp.ll
…
tailcallpic1.ll
…
tailcallpic2.ll
…
tailcallstack64.ll
…
targetLoweringGeneric.ll
Add SARX/SHRX/SHLX code generation support
2012-09-26 08:26:25 +00:00
test-nofold.ll
…
test-shrink-bug.ll
…
test-shrink.ll
…
testl-commute.ll
…
thiscall-struct-return.ll
…
tls-local-dynamic.ll
…
tls-models.ll
…
tls-pic.ll
Allow overlaps between virtreg and physreg live ranges.
2012-09-06 18:15:23 +00:00
tls-pie.ll
…
tls.ll
…
tlv-1.ll
…
tlv-2.ll
…
trap.ll
…
trunc-ext-ld-st.ll
Enable lowering ZERO_EXTEND/ANY_EXTEND to PMOVZX from SSE4.1
2012-10-23 17:34:00 +00:00
trunc-to-bool.ll
…
twoaddr-coalesce-2.ll
…
twoaddr-coalesce.ll
…
twoaddr-lea.ll
…
twoaddr-pass-sink.ll
…
twoaddr-sink-terminator.ll
…
uint64-to-float.ll
…
uint_to_fp-2.ll
…
uint_to_fp.ll
…
umul-with-carry.ll
…
umul-with-overflow.ll
…
unaligned-load.ll
…
undef-label.ll
…
unknown-location.ll
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unreachable-loop-sinking.ll
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unwindraise.ll
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urem-i8-constant.ll
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use-add-flags.ll
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utf8.ll
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utf16-cfstrings.ll
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v2f32.ll
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v4f32-immediate.ll
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v8i1-masks.ll
AVX: Fix a bug in WidenMaskArithmetic.
2013-01-02 17:40:39 +00:00
v-binop-widen2.ll
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v-binop-widen.ll
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vararg_tailcall.ll
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variable-sized-darwin-bzero.ll
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variadic-node-pic.ll
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vec_add.ll
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vec_align.ll
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vec_anyext.ll
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vec_call.ll
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vec_cast2.ll
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vec_cast.ll
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vec_clear.ll
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vec_compare-2.ll
Enable lowering ZERO_EXTEND/ANY_EXTEND to PMOVZX from SSE4.1
2012-10-23 17:34:00 +00:00
vec_compare-sse4.ll
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vec_compare.ll
X86: Shave off one shuffle from the pcmpeqq sequence for SSE2 by making use of and commutativity.
2012-12-25 13:09:08 +00:00
vec_ctbits.ll
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vec_ext_inreg.ll
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vec_extract-sse4.ll
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vec_extract.ll
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vec_fabs.ll
Add support for lowering FABS of vector types.
2012-09-08 07:31:51 +00:00
vec_floor.ll
Use roundps/pd for llvm.ceil, llvm.trunc, llvm.rint, and llvm.nearbyint of vector types.
2012-11-16 06:37:56 +00:00
vec_fneg.ll
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vec_fpext.ll
Enhance PR11334 fix to support extload from v2f32/v4f32
2012-09-10 18:33:51 +00:00
vec_i64.ll
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vec_ins_extract-1.ll
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vec_ins_extract.ll
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vec_insert-2.ll
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vec_insert-3.ll
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vec_insert-4.ll
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vec_insert-5.ll
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vec_insert-6.ll
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vec_insert-7.ll
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vec_insert-8.ll
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vec_insert-9.ll
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vec_insert.ll
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vec_loadsingles.ll
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vec_logical.ll
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vec_return.ll
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vec_set-2.ll
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vec_set-3.ll
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vec_set-4.ll
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vec_set-5.ll
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vec_set-6.ll
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vec_set-7.ll
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vec_set-8.ll
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vec_set-9.ll
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vec_set-A.ll
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vec_set-B.ll
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vec_set-C.ll
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vec_set-D.ll
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vec_set-E.ll
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vec_set-F.ll
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vec_set-G.ll
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vec_set-H.ll
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vec_set-I.ll
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vec_set-J.ll
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vec_set.ll
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vec_sext.ll
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vec_shift2.ll
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vec_shift3.ll
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vec_shift4.ll
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vec_shift.ll
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vec_shuffle-11.ll
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vec_shuffle-14.ll
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vec_shuffle-15.ll
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vec_shuffle-16.ll
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vec_shuffle-17.ll
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vec_shuffle-18.ll
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vec_shuffle-19.ll
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vec_shuffle-20.ll
Simplified BLEND pattern matching for shuffles.
2012-12-05 09:24:57 +00:00
vec_shuffle-22.ll
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vec_shuffle-23.ll
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vec_shuffle-24.ll
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vec_shuffle-25.ll
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vec_shuffle-26.ll
Add test for ATOM ISA SSSE3
2012-10-25 17:50:05 +00:00
vec_shuffle-27.ll
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vec_shuffle-28.ll
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vec_shuffle-30.ll
Re-commit r166971. I reverted it to quickly, when buildbots didn't have a chance
2012-10-30 00:01:57 +00:00
vec_shuffle-31.ll
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vec_shuffle-34.ll
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vec_shuffle-35.ll
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vec_shuffle-36.ll
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vec_shuffle-37.ll
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vec_shuffle-38.ll
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vec_shuffle-39.ll
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vec_shuffle.ll
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vec_splat-2.ll
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vec_splat-3.ll
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vec_splat-4.ll
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vec_splat.ll
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vec_ss_load_fold.ll
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vec_udiv_to_shift.ll
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vec_uint_to_fp.ll
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vec_zero_cse.ll
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vec_zero-2.ll
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vec_zero.ll
Teach DAG combine to handle vector add/sub with vectors of all 0s.
2012-12-10 08:12:29 +00:00
vec_zext.ll
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vec-sign.ll
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vec-trunc-store.ll
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vector-gep.ll
Tests: rewrite 'opt ... %s' to 'opt ... < %s' so that opt does not emit a ModuleID
2012-12-30 02:33:22 +00:00
vector-intrinsics.ll
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vector-rem.ll
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vector-variable-idx2.ll
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vector-variable-idx.ll
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vector.ll
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vfcmp.ll
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visibility2.ll
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visibility.ll
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volatile.ll
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vortex-bug.ll
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vselect-minmax.ll
try to unbreak ppc buildbots.
2012-12-21 18:11:45 +00:00
vshift_scalar.ll
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vshift_split2.ll
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vshift_split.ll
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vshift-1.ll
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vshift-2.ll
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vshift-3.ll
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vshift-4.ll
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vshift-5.ll
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vsplit-and.ll
Harden test so it's not affected by changes to compare lowering.
2012-12-25 13:23:23 +00:00
weak.ll
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wide-integer-fold.ll
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widen_arith-1.ll
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widen_arith-2.ll
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widen_arith-3.ll
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widen_arith-4.ll
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widen_arith-5.ll
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widen_arith-6.ll
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widen_cast-1.ll
Add test for ATOM ISA SSSE3
2012-10-25 17:50:05 +00:00
widen_cast-2.ll
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widen_cast-3.ll
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widen_cast-4.ll
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widen_cast-5.ll
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widen_cast-6.ll
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widen_conv-1.ll
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widen_conv-2.ll
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widen_conv-3.ll
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widen_conv-4.ll
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widen_extract-1.ll
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widen_load-0.ll
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widen_load-1.ll
Introduce 'UseSSEx' to force SSE legacy encoding
2012-08-30 16:54:46 +00:00
widen_load-2.ll
Enable lowering ZERO_EXTEND/ANY_EXTEND to PMOVZX from SSE4.1
2012-10-23 17:34:00 +00:00
widen_shuffle-1.ll
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WidenArith.ll
AVX: Fix a bug in WidenMaskArithmetic.
2013-01-02 17:40:39 +00:00
win32_sret.ll
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win64_alloca_dynalloca.ll
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win64_params.ll
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win64_vararg.ll
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win_chkstk.ll
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win_ftol2.ll
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x86_64-mul-by-const.ll
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x86-64-and-mask.ll
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x86-64-arg.ll
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x86-64-asm.ll
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x86-64-dead-stack-adjust.ll
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x86-64-disp.ll
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x86-64-extend-shift.ll
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x86-64-frameaddr.ll
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x86-64-gv-offset.ll
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x86-64-jumps.ll
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x86-64-mem.ll
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x86-64-pic-1.ll
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x86-64-pic-2.ll
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x86-64-pic-3.ll
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x86-64-pic-4.ll
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x86-64-pic-5.ll
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x86-64-pic-6.ll
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x86-64-pic-7.ll
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x86-64-pic-8.ll
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x86-64-pic-9.ll
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x86-64-pic-10.ll
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x86-64-pic-11.ll
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x86-64-ret0.ll
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x86-64-shortint.ll
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x86-64-sret-return.ll
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x86-64-tls-1.ll
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x86-64-varargs.ll
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x86-frameaddr2.ll
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x86-frameaddr.ll
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x86-shifts.ll
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x86-store-gv-addr.ll
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xmm-r64.ll
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xmulo.ll
Fix both the test for zero and what we do if we have a zero for
2012-09-13 23:24:02 +00:00
xop-intrinsics-x86_64.ll
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xor-icmp.ll
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xor.ll
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zero-remat.ll
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zext-extract_subreg.ll
…
zext-fold.ll
…
zext-inreg-0.ll
…
zext-inreg-1.ll
…
zext-sext.ll
…
zext-shl.ll
…
zext-trunc.ll
…