Chris Lattner 5e0d71877c be more aggressive about transforming add -> or when the operands have no
intersecting bits.  This triggers all over the place, for example in lencode,
with adds of stuff like:

	%tmp580 = mul i32 %tmp579, 2	
	%tmp582 = and i32 %b8, 1
and

	%tmp28 = shl i32 %abs.i, 1		
	%sign.0 = select i1 %tmp23, i32 1, i32 0
and
	%tmp344 = shl i32 %tmp343, 2	
	%tmp346 = and i32 %tmp96, 3

etc.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51263 91177308-0d34-0410-b5e6-96231b3b80d8
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This directory contains test cases for the instcombine transformation.  The
dated tests are actual bug tests, whereas the named tests are used to test
for features that the this pass should be capable of performing.