Jakob Stoklund Olesen 5f2316a3b5 Switch AllocationOrder to using RegisterClassInfo instead of a BitVector ... of reserved registers. Use RegisterClassInfo in RABasic as well. This slightly changes som allocation orders because RegisterClassInfo puts CSR aliases last. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132581 91177308-0d34-0410-b5e6-96231b3b80d8		2011-06-03 20:34:53 +00:00
..
Analysis	When merging MustAlias and PartialAlias, chose PartialAlias instead	2011-06-03 20:17:36 +00:00
Archive
AsmParser	Replace the -unwind-tables option with a per function flag. This is more	2011-05-25 03:44:17 +00:00
Bitcode	Revert name change from r132533. Lower case naming was intended per style guidelines.	2011-06-03 17:02:19 +00:00
CodeGen	Switch AllocationOrder to using RegisterClassInfo instead of a BitVector	2011-06-03 20:34:53 +00:00
CompilerDriver
ExecutionEngine
Linker
MC	.cfi directive register parsing flexibility.	2011-06-02 17:14:04 +00:00
Object
Support	singed int causes signed extension, which contradicts the intention to pick up	2011-06-03 08:29:51 +00:00
Target	Make the Uv constraint a memory operand. This doesn't solve the	2011-06-03 17:24:37 +00:00
Transforms	Use IRBuilder, preserve line numbers.	2011-06-03 19:46:19 +00:00
VMCore	Basic PassManager diagnostics.	2011-06-03 00:48:58 +00:00
CMakeLists.txt
Makefile