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https://github.com/c64scene-ar/llvm-6502.git
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aa5b9c0f6f
be deleted. This will be reapplied as soon as possible and before the 3.6 branch date at any rate. Approved by Jim Grosbach, Lang Hames, Rafael Espindola. This reverts commits r215111, 215115, 215116, 215117, 215136. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215154 91177308-0d34-0410-b5e6-96231b3b80d8
327 lines
11 KiB
C++
327 lines
11 KiB
C++
//===-- SparcJITInfo.cpp - Implement the Sparc JIT Interface --------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the JIT interfaces for the Sparc target.
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//
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//===----------------------------------------------------------------------===//
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#include "SparcJITInfo.h"
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#include "Sparc.h"
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#include "SparcRelocations.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/CodeGen/JITCodeEmitter.h"
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#include "llvm/Support/Memory.h"
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using namespace llvm;
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#define DEBUG_TYPE "jit"
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/// JITCompilerFunction - This contains the address of the JIT function used to
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/// compile a function lazily.
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static TargetJITInfo::JITCompilerFn JITCompilerFunction;
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extern "C" void SparcCompilationCallback();
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extern "C" {
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#if defined (__sparc__)
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#if defined(__arch64__)
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#define FRAME_PTR(X) #X "+2047"
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#else
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#define FRAME_PTR(X) #X
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#endif
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asm(
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".text\n"
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"\t.align 4\n"
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"\t.global SparcCompilationCallback\n"
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"\t.type SparcCompilationCallback, #function\n"
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"SparcCompilationCallback:\n"
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// Save current register window and create stack.
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// 128 (save area) + 6*8 (for arguments) + 16*8 (for float regfile) = 304
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"\tsave %sp, -304, %sp\n"
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// save float regfile to the stack.
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"\tstd %f0, [" FRAME_PTR(%fp) "-0]\n"
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"\tstd %f2, [" FRAME_PTR(%fp) "-8]\n"
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"\tstd %f4, [" FRAME_PTR(%fp) "-16]\n"
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"\tstd %f6, [" FRAME_PTR(%fp) "-24]\n"
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"\tstd %f8, [" FRAME_PTR(%fp) "-32]\n"
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"\tstd %f10, [" FRAME_PTR(%fp) "-40]\n"
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"\tstd %f12, [" FRAME_PTR(%fp) "-48]\n"
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"\tstd %f14, [" FRAME_PTR(%fp) "-56]\n"
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"\tstd %f16, [" FRAME_PTR(%fp) "-64]\n"
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"\tstd %f18, [" FRAME_PTR(%fp) "-72]\n"
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"\tstd %f20, [" FRAME_PTR(%fp) "-80]\n"
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"\tstd %f22, [" FRAME_PTR(%fp) "-88]\n"
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"\tstd %f24, [" FRAME_PTR(%fp) "-96]\n"
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"\tstd %f26, [" FRAME_PTR(%fp) "-104]\n"
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"\tstd %f28, [" FRAME_PTR(%fp) "-112]\n"
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"\tstd %f30, [" FRAME_PTR(%fp) "-120]\n"
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// stubaddr is in %g1.
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"\tcall SparcCompilationCallbackC\n"
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"\t mov %g1, %o0\n"
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// restore float regfile from the stack.
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"\tldd [" FRAME_PTR(%fp) "-0], %f0\n"
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"\tldd [" FRAME_PTR(%fp) "-8], %f2\n"
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"\tldd [" FRAME_PTR(%fp) "-16], %f4\n"
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"\tldd [" FRAME_PTR(%fp) "-24], %f6\n"
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"\tldd [" FRAME_PTR(%fp) "-32], %f8\n"
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"\tldd [" FRAME_PTR(%fp) "-40], %f10\n"
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"\tldd [" FRAME_PTR(%fp) "-48], %f12\n"
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"\tldd [" FRAME_PTR(%fp) "-56], %f14\n"
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"\tldd [" FRAME_PTR(%fp) "-64], %f16\n"
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"\tldd [" FRAME_PTR(%fp) "-72], %f18\n"
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"\tldd [" FRAME_PTR(%fp) "-80], %f20\n"
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"\tldd [" FRAME_PTR(%fp) "-88], %f22\n"
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"\tldd [" FRAME_PTR(%fp) "-96], %f24\n"
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"\tldd [" FRAME_PTR(%fp) "-104], %f26\n"
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"\tldd [" FRAME_PTR(%fp) "-112], %f28\n"
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"\tldd [" FRAME_PTR(%fp) "-120], %f30\n"
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// restore original register window and
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// copy %o0 to %g1
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"\trestore %o0, 0, %g1\n"
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// call the new stub
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"\tjmp %g1\n"
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"\t nop\n"
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"\t.size SparcCompilationCallback, .-SparcCompilationCallback"
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);
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#else
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void SparcCompilationCallback() {
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llvm_unreachable(
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"Cannot call SparcCompilationCallback() on a non-sparc arch!");
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}
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#endif
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}
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#define SETHI_INST(imm, rd) (0x01000000 | ((rd) << 25) | ((imm) & 0x3FFFFF))
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#define JMP_INST(rs1, imm, rd) (0x80000000 | ((rd) << 25) | (0x38 << 19) \
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| ((rs1) << 14) | (1 << 13) | ((imm) & 0x1FFF))
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#define NOP_INST SETHI_INST(0, 0)
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#define OR_INST_I(rs1, imm, rd) (0x80000000 | ((rd) << 25) | (0x02 << 19) \
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| ((rs1) << 14) | (1 << 13) | ((imm) & 0x1FFF))
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#define OR_INST_R(rs1, rs2, rd) (0x80000000 | ((rd) << 25) | (0x02 << 19) \
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| ((rs1) << 14) | (0 << 13) | ((rs2) & 0x1F))
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#define RDPC_INST(rd) (0x80000000 | ((rd) << 25) | (0x28 << 19) \
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| (5 << 14))
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#define LDX_INST(rs1, imm, rd) (0xC0000000 | ((rd) << 25) | (0x0B << 19) \
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| ((rs1) << 14) | (1 << 13) | ((imm) & 0x1FFF))
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#define SLLX_INST(rs1, imm, rd) (0x80000000 | ((rd) << 25) | (0x25 << 19) \
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| ((rs1) << 14) | (3 << 12) | ((imm) & 0x3F))
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#define SUB_INST(rs1, imm, rd) (0x80000000 | ((rd) << 25) | (0x04 << 19) \
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| ((rs1) << 14) | (1 << 13) | ((imm) & 0x1FFF))
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#define XOR_INST(rs1, imm, rd) (0x80000000 | ((rd) << 25) | (0x03 << 19) \
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| ((rs1) << 14) | (1 << 13) | ((imm) & 0x1FFF))
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#define BA_INST(tgt) (0x10800000 | ((tgt) & 0x3FFFFF))
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// Emit instructions to jump to Addr and store the starting address of
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// the instructions emitted in the scratch register.
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static void emitInstrForIndirectJump(intptr_t Addr,
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unsigned scratch,
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SmallVectorImpl<uint32_t> &Insts) {
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if (isInt<13>(Addr)) {
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// Emit: jmpl %g0+Addr, <scratch>
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// nop
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Insts.push_back(JMP_INST(0, LO10(Addr), scratch));
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Insts.push_back(NOP_INST);
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return;
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}
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if (isUInt<32>(Addr)) {
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// Emit: sethi %hi(Addr), scratch
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// jmpl scratch+%lo(Addr), scratch
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// sub scratch, 4, scratch
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Insts.push_back(SETHI_INST(HI22(Addr), scratch));
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Insts.push_back(JMP_INST(scratch, LO10(Addr), scratch));
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Insts.push_back(SUB_INST(scratch, 4, scratch));
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return;
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}
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if (Addr < 0 && isInt<33>(Addr)) {
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// Emit: sethi %hix(Addr), scratch)
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// xor scratch, %lox(Addr), scratch
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// jmpl scratch+0, scratch
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// sub scratch, 8, scratch
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Insts.push_back(SETHI_INST(HIX22(Addr), scratch));
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Insts.push_back(XOR_INST(scratch, LOX10(Addr), scratch));
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Insts.push_back(JMP_INST(scratch, 0, scratch));
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Insts.push_back(SUB_INST(scratch, 8, scratch));
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return;
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}
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// Emit: rd %pc, scratch
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// ldx [scratch+16], scratch
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// jmpl scratch+0, scratch
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// sub scratch, 8, scratch
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// <Addr: 8 byte>
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Insts.push_back(RDPC_INST(scratch));
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Insts.push_back(LDX_INST(scratch, 16, scratch));
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Insts.push_back(JMP_INST(scratch, 0, scratch));
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Insts.push_back(SUB_INST(scratch, 8, scratch));
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Insts.push_back((uint32_t)(((int64_t)Addr) >> 32) & 0xffffffff);
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Insts.push_back((uint32_t)(Addr & 0xffffffff));
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// Instruction sequence without rdpc instruction
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// 7 instruction and 2 scratch register
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// Emit: sethi %hh(Addr), scratch
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// or scratch, %hm(Addr), scratch
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// sllx scratch, 32, scratch
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// sethi %hi(Addr), scratch2
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// or scratch, scratch2, scratch
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// jmpl scratch+%lo(Addr), scratch
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// sub scratch, 20, scratch
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// Insts.push_back(SETHI_INST(HH22(Addr), scratch));
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// Insts.push_back(OR_INST_I(scratch, HM10(Addr), scratch));
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// Insts.push_back(SLLX_INST(scratch, 32, scratch));
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// Insts.push_back(SETHI_INST(HI22(Addr), scratch2));
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// Insts.push_back(OR_INST_R(scratch, scratch2, scratch));
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// Insts.push_back(JMP_INST(scratch, LO10(Addr), scratch));
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// Insts.push_back(SUB_INST(scratch, 20, scratch));
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}
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extern "C" void *SparcCompilationCallbackC(intptr_t StubAddr) {
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// Get the address of the compiled code for this function.
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intptr_t NewVal = (intptr_t) JITCompilerFunction((void*) StubAddr);
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// Rewrite the function stub so that we don't end up here every time we
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// execute the call. We're replacing the stub instructions with code
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// that jumps to the compiled function:
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SmallVector<uint32_t, 8> Insts;
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intptr_t diff = (NewVal - StubAddr) >> 2;
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if (isInt<22>(diff)) {
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// Use branch instruction to jump
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Insts.push_back(BA_INST(diff));
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Insts.push_back(NOP_INST);
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} else {
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// Otherwise, use indirect jump to the compiled function
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emitInstrForIndirectJump(NewVal, 1, Insts);
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}
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for (unsigned i = 0, e = Insts.size(); i != e; ++i)
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*(uint32_t *)(StubAddr + i*4) = Insts[i];
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sys::Memory::InvalidateInstructionCache((void*) StubAddr, Insts.size() * 4);
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return (void*)StubAddr;
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}
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void SparcJITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
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llvm_unreachable("FIXME: Implement SparcJITInfo::"
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"replaceMachineCodeForFunction");
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}
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TargetJITInfo::StubLayout SparcJITInfo::getStubLayout() {
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// The stub contains maximum of 4 4-byte instructions and 8 bytes for address,
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// aligned at 32 bytes.
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// See emitFunctionStub and emitInstrForIndirectJump for details.
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StubLayout Result = { 4*4 + 8, 32 };
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return Result;
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}
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void *SparcJITInfo::emitFunctionStub(const Function *F, void *Fn,
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JITCodeEmitter &JCE)
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{
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JCE.emitAlignment(32);
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void *Addr = (void*) (JCE.getCurrentPCValue());
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intptr_t CurrentAddr = (intptr_t)Addr;
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intptr_t EmittedAddr;
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SmallVector<uint32_t, 8> Insts;
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if (Fn != (void*)(intptr_t)SparcCompilationCallback) {
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EmittedAddr = (intptr_t)Fn;
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intptr_t diff = (EmittedAddr - CurrentAddr) >> 2;
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if (isInt<22>(diff)) {
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Insts.push_back(BA_INST(diff));
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Insts.push_back(NOP_INST);
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}
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} else {
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EmittedAddr = (intptr_t)SparcCompilationCallback;
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}
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if (Insts.size() == 0)
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emitInstrForIndirectJump(EmittedAddr, 1, Insts);
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if (!sys::Memory::setRangeWritable(Addr, 4 * Insts.size()))
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llvm_unreachable("ERROR: Unable to mark stub writable.");
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for (unsigned i = 0, e = Insts.size(); i != e; ++i)
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JCE.emitWordBE(Insts[i]);
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sys::Memory::InvalidateInstructionCache(Addr, 4 * Insts.size());
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if (!sys::Memory::setRangeExecutable(Addr, 4 * Insts.size()))
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llvm_unreachable("ERROR: Unable to mark stub executable.");
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return Addr;
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}
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TargetJITInfo::LazyResolverFn
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SparcJITInfo::getLazyResolverFunction(JITCompilerFn F) {
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JITCompilerFunction = F;
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return SparcCompilationCallback;
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}
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/// relocate - Before the JIT can run a block of code that has been emitted,
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/// it must rewrite the code to contain the actual addresses of any
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/// referenced global symbols.
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void SparcJITInfo::relocate(void *Function, MachineRelocation *MR,
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unsigned NumRelocs, unsigned char *GOTBase) {
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for (unsigned i = 0; i != NumRelocs; ++i, ++MR) {
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void *RelocPos = (char*) Function + MR->getMachineCodeOffset();
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intptr_t ResultPtr = (intptr_t) MR->getResultPointer();
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switch ((SP::RelocationType) MR->getRelocationType()) {
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case SP::reloc_sparc_hi:
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ResultPtr = (ResultPtr >> 10) & 0x3fffff;
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break;
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case SP::reloc_sparc_lo:
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ResultPtr = (ResultPtr & 0x3ff);
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break;
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case SP::reloc_sparc_pc30:
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ResultPtr = ((ResultPtr - (intptr_t)RelocPos) >> 2) & 0x3fffffff;
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break;
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case SP::reloc_sparc_pc22:
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ResultPtr = ((ResultPtr - (intptr_t)RelocPos) >> 2) & 0x3fffff;
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break;
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case SP::reloc_sparc_pc19:
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ResultPtr = ((ResultPtr - (intptr_t)RelocPos) >> 2) & 0x7ffff;
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break;
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case SP::reloc_sparc_h44:
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ResultPtr = (ResultPtr >> 22) & 0x3fffff;
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break;
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case SP::reloc_sparc_m44:
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ResultPtr = (ResultPtr >> 12) & 0x3ff;
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break;
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case SP::reloc_sparc_l44:
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ResultPtr = (ResultPtr & 0xfff);
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break;
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case SP::reloc_sparc_hh:
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ResultPtr = (((int64_t)ResultPtr) >> 42) & 0x3fffff;
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break;
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case SP::reloc_sparc_hm:
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ResultPtr = (((int64_t)ResultPtr) >> 32) & 0x3ff;
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break;
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}
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*((unsigned*) RelocPos) |= (unsigned) ResultPtr;
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}
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}
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