Paul Robinson 6079f00035 Teach ISel not to optimize 'optnone' functions. ...

Based on work by Andrea Di Biagio.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195317 91177308-0d34-0410-b5e6-96231b3b80d8

2013-11-21 06:33:32 +00:00

..

CostTable.h

Add a overload to CostTable which allows it to infer the size of the table.

2013-08-09 19:33:32 +00:00

Mangler.h

Move getSymbol to TargetLoweringObjectFile.

2013-10-29 17:28:26 +00:00

Target.td

[Stackmap] Add AnyReg calling convention support for patchpoint intrinsic.

2013-11-08 23:28:16 +00:00

TargetCallingConv.h

SelectionDAG: Pass along the original argument/element type in ISD::InputArg

2013-10-23 00:44:24 +00:00

TargetCallingConv.td

Add an OtherPreserved field to the CalleeSaved TableGen class.

2013-08-23 02:25:47 +00:00

TargetFrameLowering.h

[SystemZ] Clean up register scavenging code

2013-07-05 12:55:00 +00:00

TargetInstrInfo.h

Added a size field to the stack map record to handle subregister spills.

2013-11-17 01:36:23 +00:00

TargetIntrinsicInfo.h

Mark unimplemented copy constructors and copy assignment operators as LLVM_DELETED_FUNCTION.

2012-09-17 06:59:23 +00:00

TargetItinerary.td

I'm introducing a new machine model to simultaneously allow simple

2012-07-07 04:00:00 +00:00

TargetJITInfo.h

Sort the #include lines for the include/... tree with the script.

2012-12-03 17:02:12 +00:00

TargetLibraryInfo.h

Convert calls to __sinpi and __cospi into __sincospi_stret

2013-11-03 06:48:38 +00:00

TargetLowering.h

Add target hook to prevent folding some bitcasted loads.

2013-11-15 04:42:23 +00:00

TargetLoweringObjectFile.h

Move getSymbol to TargetLoweringObjectFile.

2013-10-29 17:28:26 +00:00

TargetMachine.h

Teach ISel not to optimize 'optnone' functions.

2013-11-21 06:33:32 +00:00

TargetOpcodes.h

Lower stackmap intrinsics directly to their target opcode in the DAG builder.

2013-10-31 17:18:24 +00:00

TargetOptions.h

Use function attributes to indicate that we don't want to realign the stack.

2013-08-01 21:42:05 +00:00

TargetRegisterInfo.h

PrintVRegOrUnit

2013-08-23 17:48:53 +00:00

TargetSchedule.td

Even more spelling fixes for "instruction".

2013-09-28 13:42:22 +00:00

TargetSelectionDAG.td

Inplement aarch64 neon instructions in AdvSIMD(shift). About 24 shift instructions:

2013-09-04 09:28:24 +00:00

TargetSelectionDAGInfo.h

[SystemZ] Use SRST to optimize memchr

2013-08-20 09:38:48 +00:00

TargetSubtargetInfo.h

Added temp flag -misched-bench for staging in default changes.

2013-09-26 05:53:35 +00:00