Oliver Stannard e13ea1ddda [AArch64] Fix miscompile of comparison with 0xffffffffffffffff ...

Some literals in the AArch64 backend had 15 'f's rather than 16, causing
comparisons with a constant 0xffffffffffffffff to be miscompiled.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221157 91177308-0d34-0410-b5e6-96231b3b80d8

2014-11-03 15:28:40 +00:00

..

AArch64

[AArch64] Fix miscompile of comparison with 0xffffffffffffffff

2014-11-03 15:28:40 +00:00

ARM

[CodeGenPrepare] Move extractelement close to store if they can be combined.

2014-10-31 17:52:53 +00:00

CPP

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Generic

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Hexagon

Handle ctor/init_array initialization.

2014-11-03 14:56:05 +00:00

Inputs

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Mips

[mips] For N32/N64, structs must be passed in the upper bits of a register.

2014-10-24 13:09:19 +00:00

MSP430

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NVPTX

[NVPTX] aligned byte-buffers for vector return types

2014-10-25 03:46:16 +00:00

PowerPC

[PowerPC] Initial VSX intrinsic support, with min/max for vector double

2014-10-31 19:19:07 +00:00

R600

Revert "R600: Make sure to inline all internal functions"

2014-10-31 23:35:26 +00:00

SPARC

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SystemZ

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Thumb

[Thumb] Fix crash in Thumb1RegisterInfo::rewriteFrameIndex

2014-10-20 11:00:18 +00:00

Thumb2

ARM: Fix a bug which was causing convergence failure in constant-island pass.

2014-10-17 01:31:47 +00:00

X86

Revert "Temporarily revert r220777 to sort out build bot breakage."

2014-11-01 03:19:45 +00:00

XCore

Fix a bit of confusion about .set and produce more readable assembly.

2014-10-21 01:17:30 +00:00