mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-21 19:32:16 +00:00
dea8105323
This function was complicated by the fact that it tried to perform canonicalizations that were already preformed by InstSimplify. Remove this extra code and move the tests over to InstSimplify. Add asserts to make sure our preconditions hold before we make any assumptions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220314 91177308-0d34-0410-b5e6-96231b3b80d8
333 lines
7.3 KiB
LLVM
333 lines
7.3 KiB
LLVM
; RUN: opt < %s -instsimplify -S | FileCheck %s
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; CHECK-LABEL: @foo
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; CHECK: %[[and:.*]] = and i32 %x, 1
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; CHECK-NEXT: %[[add:.*]] = add i32 %[[and]], -1
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; CHECK-NEXT: ret i32 %[[add]]
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define i32 @foo(i32 %x) {
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%o = and i32 %x, 1
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%n = add i32 %o, -1
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%t = ashr i32 %n, 17
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ret i32 %t
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}
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; CHECK-LABEL: @exact_lshr_eq_both_zero
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; CHECK-NEXT: ret i1 true
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define i1 @exact_lshr_eq_both_zero(i8 %a) {
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%shr = lshr exact i8 0, %a
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%cmp = icmp eq i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_ashr_eq_both_zero
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; CHECK-NEXT: ret i1 true
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define i1 @exact_ashr_eq_both_zero(i8 %a) {
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%shr = ashr exact i8 0, %a
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%cmp = icmp eq i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_ashr_eq_both_zero
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; CHECK-NEXT: ret i1 true
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define i1 @nonexact_ashr_eq_both_zero(i8 %a) {
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%shr = ashr i8 0, %a
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%cmp = icmp eq i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_lshr_ne_both_zero
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; CHECK-NEXT: ret i1 false
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define i1 @exact_lshr_ne_both_zero(i8 %a) {
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%shr = lshr exact i8 0, %a
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%cmp = icmp ne i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_ashr_ne_both_zero
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; CHECK-NEXT: ret i1 false
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define i1 @exact_ashr_ne_both_zero(i8 %a) {
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%shr = ashr exact i8 0, %a
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%cmp = icmp ne i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_lshr_ne_both_zero
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; CHECK-NEXT: ret i1 false
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define i1 @nonexact_lshr_ne_both_zero(i8 %a) {
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%shr = lshr i8 0, %a
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%cmp = icmp ne i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_ashr_ne_both_zero
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; CHECK-NEXT: ret i1 false
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define i1 @nonexact_ashr_ne_both_zero(i8 %a) {
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%shr = ashr i8 0, %a
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%cmp = icmp ne i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_lshr_eq_last_zero
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; CHECK-NEXT: ret i1 false
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define i1 @exact_lshr_eq_last_zero(i8 %a) {
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%shr = lshr exact i8 128, %a
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%cmp = icmp eq i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_ashr_eq_last_zero
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; CHECK-NEXT: ret i1 false
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define i1 @exact_ashr_eq_last_zero(i8 %a) {
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%shr = ashr exact i8 -128, %a
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%cmp = icmp eq i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_lshr_eq_both_zero
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; CHECK-NEXT: ret i1 true
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define i1 @nonexact_lshr_eq_both_zero(i8 %a) {
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%shr = lshr i8 0, %a
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%cmp = icmp eq i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_lshr_ne_last_zero
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; CHECK-NEXT: ret i1 true
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define i1 @exact_lshr_ne_last_zero(i8 %a) {
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%shr = lshr exact i8 128, %a
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%cmp = icmp ne i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_ashr_ne_last_zero
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; CHECK-NEXT: ret i1 true
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define i1 @exact_ashr_ne_last_zero(i8 %a) {
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%shr = ashr exact i8 -128, %a
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%cmp = icmp ne i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_lshr_eq_last_zero
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; CHECK-NEXT: ret i1 false
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define i1 @nonexact_lshr_eq_last_zero(i8 %a) {
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%shr = lshr i8 128, %a
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%cmp = icmp eq i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_ashr_eq_last_zero
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; CHECK-NEXT: ret i1 false
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define i1 @nonexact_ashr_eq_last_zero(i8 %a) {
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%shr = ashr i8 -128, %a
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%cmp = icmp eq i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_lshr_ne_last_zero
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; CHECK-NEXT: ret i1 true
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define i1 @nonexact_lshr_ne_last_zero(i8 %a) {
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%shr = lshr i8 128, %a
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%cmp = icmp ne i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_ashr_ne_last_zero
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; CHECK-NEXT: ret i1 true
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define i1 @nonexact_ashr_ne_last_zero(i8 %a) {
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%shr = ashr i8 -128, %a
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%cmp = icmp ne i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @lshr_eq_first_zero
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; CHECK-NEXT: ret i1 false
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define i1 @lshr_eq_first_zero(i8 %a) {
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%shr = lshr i8 0, %a
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%cmp = icmp eq i8 %shr, 2
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ret i1 %cmp
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}
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; CHECK-LABEL: @ashr_eq_first_zero
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; CHECK-NEXT: ret i1 false
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define i1 @ashr_eq_first_zero(i8 %a) {
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%shr = ashr i8 0, %a
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%cmp = icmp eq i8 %shr, 2
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ret i1 %cmp
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}
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; CHECK-LABEL: @lshr_ne_first_zero
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; CHECK-NEXT: ret i1 true
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define i1 @lshr_ne_first_zero(i8 %a) {
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%shr = lshr i8 0, %a
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%cmp = icmp ne i8 %shr, 2
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ret i1 %cmp
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}
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; CHECK-LABEL: @ashr_ne_first_zero
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; CHECK-NEXT: ret i1 true
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define i1 @ashr_ne_first_zero(i8 %a) {
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%shr = ashr i8 0, %a
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%cmp = icmp ne i8 %shr, 2
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ret i1 %cmp
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}
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; CHECK-LABEL: @ashr_eq_both_minus1
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; CHECK-NEXT: ret i1 true
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define i1 @ashr_eq_both_minus1(i8 %a) {
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%shr = ashr i8 -1, %a
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%cmp = icmp eq i8 %shr, -1
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ret i1 %cmp
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}
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; CHECK-LABEL: @ashr_ne_both_minus1
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; CHECK-NEXT: ret i1 false
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define i1 @ashr_ne_both_minus1(i8 %a) {
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%shr = ashr i8 -1, %a
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%cmp = icmp ne i8 %shr, -1
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_ashr_eq_both_minus1
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; CHECK-NEXT: ret i1 true
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define i1 @exact_ashr_eq_both_minus1(i8 %a) {
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%shr = ashr exact i8 -1, %a
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%cmp = icmp eq i8 %shr, -1
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_ashr_ne_both_minus1
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; CHECK-NEXT: ret i1 false
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define i1 @exact_ashr_ne_both_minus1(i8 %a) {
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%shr = ashr exact i8 -1, %a
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%cmp = icmp ne i8 %shr, -1
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_ashr_eq_opposite_msb
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; CHECK-NEXT: ret i1 false
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define i1 @exact_ashr_eq_opposite_msb(i8 %a) {
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%shr = ashr exact i8 -128, %a
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%cmp = icmp eq i8 %shr, 1
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_ashr_eq_noexactlog
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; CHECK-NEXT: ret i1 false
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define i1 @exact_ashr_eq_noexactlog(i8 %a) {
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%shr = ashr exact i8 -90, %a
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%cmp = icmp eq i8 %shr, -30
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_ashr_ne_opposite_msb
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; CHECK-NEXT: ret i1 true
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define i1 @exact_ashr_ne_opposite_msb(i8 %a) {
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%shr = ashr exact i8 -128, %a
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%cmp = icmp ne i8 %shr, 1
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ret i1 %cmp
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}
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; CHECK-LABEL: @ashr_eq_opposite_msb
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; CHECK-NEXT: ret i1 false
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define i1 @ashr_eq_opposite_msb(i8 %a) {
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%shr = ashr i8 -128, %a
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%cmp = icmp eq i8 %shr, 1
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ret i1 %cmp
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}
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; CHECK-LABEL: @ashr_ne_opposite_msb
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; CHECK-NEXT: ret i1 true
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define i1 @ashr_ne_opposite_msb(i8 %a) {
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%shr = ashr i8 -128, %a
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%cmp = icmp ne i8 %shr, 1
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_ashr_eq_shift_gt
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; CHECK-NEXT : ret i1 false
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define i1 @exact_ashr_eq_shift_gt(i8 %a) {
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%shr = ashr exact i8 -2, %a
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%cmp = icmp eq i8 %shr, -8
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_ashr_ne_shift_gt
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; CHECK-NEXT : ret i1 true
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define i1 @exact_ashr_ne_shift_gt(i8 %a) {
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%shr = ashr exact i8 -2, %a
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%cmp = icmp ne i8 %shr, -8
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_ashr_eq_shift_gt
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; CHECK-NEXT : ret i1 false
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define i1 @nonexact_ashr_eq_shift_gt(i8 %a) {
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%shr = ashr i8 -2, %a
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%cmp = icmp eq i8 %shr, -8
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_ashr_ne_shift_gt
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; CHECK-NEXT : ret i1 true
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define i1 @nonexact_ashr_ne_shift_gt(i8 %a) {
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%shr = ashr i8 -2, %a
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%cmp = icmp ne i8 %shr, -8
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_lshr_eq_shift_gt
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; CHECK-NEXT: ret i1 false
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define i1 @exact_lshr_eq_shift_gt(i8 %a) {
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%shr = lshr exact i8 2, %a
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%cmp = icmp eq i8 %shr, 8
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_lshr_ne_shift_gt
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; CHECK-NEXT: ret i1 true
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define i1 @exact_lshr_ne_shift_gt(i8 %a) {
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%shr = lshr exact i8 2, %a
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%cmp = icmp ne i8 %shr, 8
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_lshr_eq_shift_gt
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; CHECK-NEXT : ret i1 false
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define i1 @nonexact_lshr_eq_shift_gt(i8 %a) {
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%shr = lshr i8 2, %a
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%cmp = icmp eq i8 %shr, 8
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_lshr_ne_shift_gt
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; CHECK-NEXT : ret i1 true
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define i1 @nonexact_lshr_ne_shift_gt(i8 %a) {
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%shr = ashr i8 2, %a
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%cmp = icmp ne i8 %shr, 8
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_ashr_ne_noexactlog
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; CHECK-NEXT: ret i1 true
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define i1 @exact_ashr_ne_noexactlog(i8 %a) {
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%shr = ashr exact i8 -90, %a
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%cmp = icmp ne i8 %shr, -30
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_lshr_eq_noexactlog
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; CHECK-NEXT: ret i1 false
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define i1 @exact_lshr_eq_noexactlog(i8 %a) {
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%shr = lshr exact i8 90, %a
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%cmp = icmp eq i8 %shr, 30
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_lshr_ne_noexactlog
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; CHECK-NEXT: ret i1 true
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define i1 @exact_lshr_ne_noexactlog(i8 %a) {
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%shr = lshr exact i8 90, %a
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%cmp = icmp ne i8 %shr, 30
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ret i1 %cmp
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}
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