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https://github.com/c64scene-ar/llvm-6502.git
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57f0db833d
them are generic changes. - Use the "fast" flag that's already being passed into the asm printers instead of shoving it into the DwarfWriter. - Instead of calling "MI->getParent()->getParent()" for every MI, set the machine function when calling "runOnMachineFunction" in the asm printers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65379 91177308-0d34-0410-b5e6-96231b3b80d8
91 lines
3.1 KiB
C++
91 lines
3.1 KiB
C++
//===-- SparcTargetMachine.cpp - Define TargetMachine for Sparc -----------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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//
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//===----------------------------------------------------------------------===//
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#include "SparcTargetAsmInfo.h"
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#include "SparcTargetMachine.h"
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#include "Sparc.h"
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#include "llvm/Module.h"
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#include "llvm/PassManager.h"
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#include "llvm/Target/TargetMachineRegistry.h"
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using namespace llvm;
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/// SparcTargetMachineModule - Note that this is used on hosts that
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/// cannot link in a library unless there are references into the
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/// library. In particular, it seems that it is not possible to get
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/// things to work on Win32 without this. Though it is unused, do not
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/// remove it.
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extern "C" int SparcTargetMachineModule;
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int SparcTargetMachineModule = 0;
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// Register the target.
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static RegisterTarget<SparcTargetMachine> X("sparc", "SPARC");
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const TargetAsmInfo *SparcTargetMachine::createTargetAsmInfo() const {
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// FIXME: Handle Solaris subtarget someday :)
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return new SparcELFTargetAsmInfo(*this);
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}
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/// SparcTargetMachine ctor - Create an ILP32 architecture model
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///
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SparcTargetMachine::SparcTargetMachine(const Module &M, const std::string &FS)
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: DataLayout("E-p:32:32-f128:128:128"),
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Subtarget(M, FS), TLInfo(*this), InstrInfo(Subtarget),
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FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) {
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}
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unsigned SparcTargetMachine::getModuleMatchQuality(const Module &M) {
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std::string TT = M.getTargetTriple();
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if (TT.size() >= 6 && std::string(TT.begin(), TT.begin()+6) == "sparc-")
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return 20;
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// If the target triple is something non-sparc, we don't match.
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if (!TT.empty()) return 0;
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if (M.getEndianness() == Module::BigEndian &&
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M.getPointerSize() == Module::Pointer32)
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#ifdef __sparc__
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return 20; // BE/32 ==> Prefer sparc on sparc
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#else
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return 5; // BE/32 ==> Prefer ppc elsewhere
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#endif
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else if (M.getEndianness() != Module::AnyEndianness ||
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M.getPointerSize() != Module::AnyPointerSize)
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return 0; // Match for some other target
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#if defined(__sparc__)
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return 10;
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#else
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return 0;
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#endif
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}
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bool SparcTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
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PM.add(createSparcISelDag(*this));
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return false;
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}
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/// addPreEmitPass - This pass may be implemented by targets that want to run
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/// passes immediately before machine code is emitted. This should return
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/// true if -print-machineinstrs should print out the code after the passes.
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bool SparcTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
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PM.add(createSparcFPMoverPass(*this));
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PM.add(createSparcDelaySlotFillerPass(*this));
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return true;
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}
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bool SparcTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
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raw_ostream &Out) {
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// Output assembly language.
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PM.add(createSparcCodePrinterPass(Out, *this, Fast));
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return false;
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}
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